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(parent: b509581) | patch
Add Tercel PHY reset synchronization master
authorRaptor Engineering Development Team <support@raptorengineering.com>
Sat, 2 Apr 2022 19:11:08 +0000 (14:11 -0500)
committerRaptor Engineering Development Team <support@raptorengineering.com>
Sat, 2 Apr 2022 19:26:09 +0000 (14:26 -0500)
commitbf4f5806849d42d8fa74953483391590136159ac
tree12dc7a4b17debb2c686c0b099cb58b0359c98ed1tree
parentb509581c56a455a89dc59f1a2fdb86d21b85ed09commit | diff
Add Tercel PHY reset synchronization

When the external peripheral reset pulse length is short
compared to the PHY clock period, the power on reset
may be missed leaving the PHY in an undefined state.

Synchronize the external peripheral reset signal into
the PHY clock domain to avoid this potential issue.
tercel/phy.v diff | blob | history
tercel/wishbone_spi_master.v diff | blob | history