Add debug_module bus device.
authorTim Newsome <tim@sifive.com>
Sun, 24 Apr 2016 15:54:19 +0000 (08:54 -0700)
committerTim Newsome <tim@sifive.com>
Mon, 23 May 2016 19:12:11 +0000 (12:12 -0700)
commitd999dfc0d41a119730ff8944d37dbee88bf99723
tree2268c9d7d5f122fb81253d10bd05901eaff0ff62
parent191671a2015136c429394fd3051e4a9c1ff45352
Add debug_module bus device.

This should replace the ROM hack I implemented earlier, but for now both
exist together.

Back to the point where gdb connects, core jumps to ROM->RAM->ROM.
18 files changed:
debug_rom/Makefile
debug_rom/debug_rom.S
debug_rom/debug_rom.h
riscv/debug_module.cc [new file with mode: 0644]
riscv/debug_module.h [new file with mode: 0644]
riscv/decode.h
riscv/devices.cc
riscv/devices.h
riscv/execute.cc
riscv/gdbserver.cc
riscv/gdbserver.h
riscv/mmu.cc
riscv/mmu.h
riscv/processor.cc
riscv/processor.h
riscv/riscv.mk.in
riscv/sim.cc
riscv/sim.h