class SimpleF18Test(SimpleRegisterTest):
def check_reg(self, name, alias):
- self.gdb.p_raw("$mstatus=$mstatus | 0x00006000")
- self.gdb.stepi()
- a = random.random()
- b = random.random()
- self.gdb.p_raw("$%s=%f" % (name, a))
- assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - a), .001)
- self.gdb.stepi()
- assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - a), .001)
- assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - a), .001)
- self.gdb.p_raw("$%s=%f" % (alias, b))
- assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - b), .001)
- self.gdb.stepi()
- assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - b), .001)
- assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - b), .001)
+ if self.hart.extensionSupported('F'):
+ self.gdb.p_raw("$mstatus=$mstatus | 0x00006000")
+ self.gdb.stepi()
+ a = random.random()
+ b = random.random()
+ self.gdb.p_raw("$%s=%f" % (name, a))
+ assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - a), .001)
+ self.gdb.stepi()
+ assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - a), .001)
+ assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - a), .001)
+ self.gdb.p_raw("$%s=%f" % (alias, b))
+ assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - b), .001)
+ self.gdb.stepi()
+ assertLess(abs(float(self.gdb.p_raw("$%s" % name)) - b), .001)
+ assertLess(abs(float(self.gdb.p_raw("$%s" % alias)) - b), .001)
- def early_applicable(self):
- return self.hart.extensionSupported('F')
+ size = self.gdb.p("sizeof($%s)" % name)
+ if self.hart.extensionSupported('D'):
+ assertEqual(size, 8)
+ else:
+ assertEqual(size, 4)
+ else:
+ output = self.gdb.p_raw("$" + name)
+ assertEqual(output, "void")
+ output = self.gdb.p_raw("$" + alias)
+ assertEqual(output, "void")
def test(self):
self.check_reg("f18", "fs2")
output = self.gdb.command(cmd)
for reg in ('zero', 'ra', 'sp', 'gp', 'tp'):
assertIn(reg, output)
+ for line in output.splitlines():
+ assertRegexpMatches(line, r"^\S")
#TODO
# mcpuid is one of the few registers that should have the high bit set
class PrivRw(PrivTest):
def test(self):
"""Test reading/writing priv."""
+ # Disable physical memory protection by allowing U mode access to all
+ # memory.
+ self.gdb.p("$pmpcfg0=0xf") # TOR, R, W, X
+ self.gdb.p("$pmpaddr0=0x%x" %
+ ((self.hart.ram + self.hart.ram_size) >> 2))
+
+ # Leave the PC at _start, where the first 4 instructions should be
+ # legal in any mode.
for privilege in range(4):
self.gdb.p("$priv=%d" % privilege)
self.gdb.stepi()
global parsed # pylint: disable=global-statement
parsed = parser.parse_args()
target = targets.target(parsed)
-
testlib.print_log_names = parsed.print_log_names
- if parsed.xlen:
- target.xlen = parsed.xlen
-
module = sys.modules[__name__]
return testlib.run_all_tests(module, target, parsed)