Add test case for `riscv expose_custom`.

[riscv-tests.git] / debug / targets.py

diff --git a/debug/targets.py b/debug/targets.py
index 2cdbb33454270663b701f549c004624b8f4f326e..63994db87cd252b98839c23ade1597a198b839ae 100644 (file)
--- a/debug/targets.py
+++ b/debug/targets.py
@@ -75,6 +75,10 @@ class Target(object):
     # Supports mtime at 0x2004000
     supports_clint_mtime = True
 
+    # Implements custom debug registers like spike does. It seems unlikely any
+    # hardware will every do that.
+    implements_custom_test = False
+
     # Internal variables:
     directory = None
     temporary_files = []