Test FPRs that aren't XLEN in size.

[riscv-tests.git] / debug / testlib.py

diff --git a/debug/testlib.py b/debug/testlib.py
index 21eeb3d511c55b91ed52a29e3381b21a13bc48d6..94ee83e79792e93de50af688068fd276a4974d3b 100644 (file)
--- a/debug/testlib.py
+++ b/debug/testlib.py
@@ -9,6 +9,7 @@ import sys
 import tempfile
 import time
 import traceback
+import pipes
 
 import pexpect
 
@@ -55,10 +56,12 @@ def compile(args, xlen=32): # pylint: disable=redefined-builtin
         raise Exception("Compile failed!")
 
 class Spike(object):
-    def __init__(self, target, halted=False, timeout=None, with_jtag_gdb=True):
+    def __init__(self, target, halted=False, timeout=None, with_jtag_gdb=True,
+            isa=None):
         """Launch spike. Return tuple of its process and the port it's running
         on."""
         self.process = None
+        self.isa = isa
 
         if target.harts:
             harts = target.harts
@@ -108,10 +111,12 @@ class Spike(object):
         assert len(set(t.xlen for t in harts)) == 1, \
                 "All spike harts must have the same XLEN"
 
-        if harts[0].xlen == 32:
-            cmd += ["--isa", "RV32G"]
+        if self.isa:
+            isa = self.isa
         else:
-            cmd += ["--isa", "RV64G"]
+            isa = "RV%dG" % harts[0].xlen
+
+        cmd += ["--isa", isa]
 
         assert len(set(t.ram for t in harts)) == 1, \
                 "All spike harts must have the same RAM layout"
@@ -237,7 +242,11 @@ class Openocd(object):
         logfile = open(Openocd.logname, "w")
         if print_log_names:
             real_stdout.write("Temporary OpenOCD log: %s\n" % Openocd.logname)
-        logfile.write("+ %s\n" % " ".join(cmd))
+        env_entries = ("REMOTE_BITBANG_HOST", "REMOTE_BITBANG_PORT")
+        env_entries = [key for key in env_entries if key in os.environ]
+        logfile.write("+ %s%s\n" % (
+            "".join("%s=%s " % (key, os.environ[key]) for key in env_entries),
+            " ".join(map(pipes.quote, cmd))))
         logfile.flush()
 
         self.gdb_ports = []
@@ -795,7 +804,6 @@ class GdbTest(BaseTest):
         self.logs += self.gdb.lognames()
         self.gdb.connect()
 
-        self.gdb.global_command("set arch riscv:rv%d" % self.hart.xlen)
         self.gdb.global_command("set remotetimeout %d" %
             self.target.timeout_sec)