devices: include DTS meta-data

[sifive-blocks.git] / src / main / scala / devices / pwm / PWM.scala

diff --git a/src/main/scala/devices/pwm/PWM.scala b/src/main/scala/devices/pwm/PWM.scala
index 7bf8d2978950c2c47d426869ba3cb7ace7aeb386..14f365d80ab47c2f034ede917eab853f9fe05008 100644 (file)
--- a/src/main/scala/devices/pwm/PWM.scala
+++ b/src/main/scala/devices/pwm/PWM.scala
@@ -62,6 +62,6 @@ trait HasPWMModuleContents extends Module with HasRegMap {
 }
 
 class TLPWM(w: Int, c: PWMParams)(implicit p: Parameters)
-  extends TLRegisterRouter(c.address, interrupts = c.ncmp, size = c.size, beatBytes = w)(
+  extends TLRegisterRouter(c.address, "pwm", Seq("sifive,pwm0"), interrupts = c.ncmp, size = c.size, beatBytes = w)(
   new TLRegBundle(c, _)    with HasPWMBundleContents)(
   new TLRegModule(c, _, _) with HasPWMModuleContents)