Use HomogenousBag to handle lists of peripherals

[sifive-blocks.git] / src / main / scala / devices / spi / SPIPeriphery.scala

diff --git a/src/main/scala/devices/spi/SPIPeriphery.scala b/src/main/scala/devices/spi/SPIPeriphery.scala
index f4773a228c7cabf9646381ed4b9cea756be77270..bdd74c66a041e8aaa80f90df21c3855768015361 100644 (file)
--- a/src/main/scala/devices/spi/SPIPeriphery.scala
+++ b/src/main/scala/devices/spi/SPIPeriphery.scala
@@ -5,6 +5,7 @@ import Chisel._
 import diplomacy.LazyModule
 import uncore.tilelink2._
 import rocketchip.{TopNetwork,TopNetworkModule}
+import util.HeterogeneousBag
 
 trait PeripherySPI {
   this: TopNetwork { val spiConfigs: Seq[SPIConfig] } =>
@@ -18,8 +19,7 @@ trait PeripherySPI {
 
 trait PeripherySPIBundle {
   this: { val spiConfigs: Seq[SPIConfig] } =>
-  val spi_bc = spiConfigs.map(_.bc).reduce(_.union(_))
-  val spis = Vec(spiConfigs.size, new SPIPortIO(spi_bc.toSPIConfig))
+  val spis = HeterogeneousBag(spiConfigs.map(new SPIPortIO(_)))
 }
 
 trait PeripherySPIModule {