use git submodule soclayout for source files, rather than
[soc-cocotb-sim.git] / ls180 /
drwxr-xr-x   ..
-rw-r--r-- 651 SPBlock_512W64B8W.v
-rw-r--r-- 1536 SPBlock_512W64B8W.vhdl
drwxr-xr-x - experiment9_recon
-rw-r--r-- 314 pll.v
drwxr-xr-x - post_pnr
drwxr-xr-x - pre_pnr
-rw-r--r-- 651 spblock_512w64b8w.v