Allow the formal engine to perform a same-cycle result in the ALU

[soc.git] / flake.nix

diff --git a/flake.nix b/flake.nix
index 2027d9bfb91b26441d3fe790ea58fbcb3bd764d4..90a976cb28525ebd39463b2089e9793e24da2144 100644 (file)
--- a/flake.nix
+++ b/flake.nix
@@ -1,5 +1,3 @@
-# The license for this file is included in the `nix` directory next to this file.
-
 {
   description = "FOSS CPU/GPU/VPU/SoC all in one, see https://libre-soc.org/";
 
@@ -69,7 +67,7 @@
           src = yosys;
         });
 
-        libresoc-pre-litex = final.callPackage (import ./nix/pre-litex.nix { version = getv self; }) { python3Packages = final.python37Packages; };
+        libresoc-verilog = final.callPackage (import ./nix/verilog.nix { version = getv self; }) { python3Packages = final.python37Packages; };
         libresoc-ls180 = final.callPackage (import ./nix/ls180.nix { version = getv self; }) { python3Packages = final.python37Packages; };
         libresoc-ecp5 = final.callPackage (import ./nix/ecp5.nix { version = getv self; }) { python3Packages = final.python37Packages; };
         libresoc-ecp5-program = final.callPackage (import ./nix/ecp5-program.nix { version = getv self; }) { python3Packages = final.python37Packages; };
@@ -86,7 +84,7 @@
 
       packages = forAllSystems (system: {
         soc = nixpkgsFor.${system}.python37Packages.libresoc-soc;
-        pre-litex = nixpkgsFor.${system}.libresoc-pre-litex;
+        verilog = nixpkgsFor.${system}.libresoc-verilog;
         pinmux = nixpkgsFor.${system}.libresoc-pinmux;
         ls180 = nixpkgsFor.${system}.libresoc-ls180;
         ecp5 = nixpkgsFor.${system}.libresoc-ecp5;
@@ -95,6 +93,6 @@
         debugNixpkgs = nixpkgsFor.${system};
       });
 
-      defaultPackage = forAllSystems (system: self.packages.${system}.pre-litex);
+      defaultPackage = forAllSystems (system: self.packages.${system}.verilog);
     };
 }