Merge pull request #127 from tomtor/CR-PR
[microwatt.git] / README.md
1 <p align="center">
2 <img src="media/microwatt-title.png" alt="Microwatt">
3 </p>
4
5 # Microwatt
6
7 A tiny Open POWER ISA softcore written in VHDL 2008. It aims to be simple and easy
8 to understand.
9
10 ## Simulation using ghdl
11 <p align="center">
12 <img src="http://neuling.org/microwatt-micropython.gif" alt="MicroPython running on Microwatt"/>
13 </p>
14
15 You can try out Microwatt/Micropython without hardware by using the ghdl simulator. If you want to build directly for a hardware target board, see below.
16
17 - Build micropython. If you aren't building on a ppc64le box you
18 will need a cross compiler. If it isn't available on your distro
19 grab the powerpc64le-power8 toolchain from https://toolchains.bootlin.com
20
21 ```
22 git clone https://github.com/micropython/micropython.git
23 cd micropython
24 cd ports/powerpc
25 make -j$(nproc)
26 cd ../../../
27 ```
28
29 - Microwatt uses ghdl for simulation. Either install this from your
30 distro or build it. Next build microwatt:
31
32 ```
33 git clone https://github.com/antonblanchard/microwatt
34 cd microwatt
35 make
36 ```
37
38 - Link in the micropython image:
39
40 ```
41 ln -s ../micropython/ports/powerpc/build/firmware.bin main_ram.bin
42 ```
43
44 - Now run microwatt, sending debug output to /dev/null:
45
46 ```
47 ./core_tb > /dev/null
48 ```
49
50 ## Synthesis on Xilinx FPGAs using Vivado
51
52 - Install Vivado (I'm using the free 2019.1 webpack edition).
53
54 - Setup Vivado paths:
55
56 ```
57 source /opt/Xilinx/Vivado/2019.1/settings64.sh
58 ```
59
60 - Install FuseSoC:
61
62 ```
63 pip3 install --user -U fusesoc
64 ```
65 Fedora users can get FuseSoC package via
66 ```
67 sudo dnf copr enable sharkcz/danny
68 sudo dnf install fusesoc
69 ```
70
71 - Create a working directory and point FuseSoC at microwatt:
72
73 ```
74 mkdir microwatt-fusesoc
75 cd microwatt-fusesoc
76 fusesoc library add microwatt /path/to/microwatt/
77 ```
78
79 - Build using FuseSoC. For hello world (Replace nexys_video with your FPGA board such as --target=arty_a7-100):
80
81 ```
82 fusesoc run --target=nexys_video microwatt --memory_size=8192 --ram_init_file=/path/to/microwatt/fpga/hello_world.hex
83 ```
84 You should then be able to see output via the serial port of the board (/dev/ttyUSB1, 115200 for example assuming standard clock speeds). There is a know bug where initial output may not be sent - try the reset (not programming button on your board if you don't see anything.
85
86 - To build micropython (currently requires 1MB of BRAM eg an Artix-7 A200):
87
88 ```
89 fusesoc run --target=nexys_video microwatt
90 ```
91
92 ## Testing
93
94 - A simple test suite containing random execution test cases and a couple of
95 micropython test cases can be run with:
96
97 ```
98 make -j$(nproc) check
99 ```
100
101 ## Issues
102
103 This is functional, but very simple. We still have quite a lot to do:
104
105 - There are a few instructions still to be implemented
106 - Need to add caches and bypassing (in progress)
107 - Need to add supervisor state (in progress)