bootrom/sdboot/include/devices/spi.h

   1 // See LICENSE for license details.
   2
   3 #ifndef _SIFIVE_SPI_H
   4 #define _SIFIVE_SPI_H
   5
   6 /* Register offsets */
   7
   8 #define SPI_REG_SCKDIV          0x00
   9 #define SPI_REG_SCKMODE         0x04
  10 #define SPI_REG_CSID            0x10
  11 #define SPI_REG_CSDEF           0x14
  12 #define SPI_REG_CSMODE          0x18
  13
  14 #define SPI_REG_DCSSCK          0x28
  15 #define SPI_REG_DSCKCS          0x2a
  16 #define SPI_REG_DINTERCS        0x2c
  17 #define SPI_REG_DINTERXFR       0x2e
  18
  19 #define SPI_REG_FMT             0x40
  20 #define SPI_REG_TXFIFO          0x48
  21 #define SPI_REG_RXFIFO          0x4c
  22 #define SPI_REG_TXCTRL          0x50
  23 #define SPI_REG_RXCTRL          0x54
  24
  25 #define SPI_REG_FCTRL           0x60
  26 #define SPI_REG_FFMT            0x64
  27
  28 #define SPI_REG_IE              0x70
  29 #define SPI_REG_IP              0x74
  30
  31 /* Fields */
  32
  33 #define SPI_SCK_POL             0x1
  34 #define SPI_SCK_PHA             0x2
  35
  36 #define SPI_FMT_PROTO(x)        ((x) & 0x3)
  37 #define SPI_FMT_ENDIAN(x)       (((x) & 0x1) << 2)
  38 #define SPI_FMT_DIR(x)          (((x) & 0x1) << 3)
  39 #define SPI_FMT_LEN(x)          (((x) & 0xf) << 16)
  40
  41 /* TXCTRL register */
  42 #define SPI_TXWM(x)             ((x) & 0xffff)
  43 /* RXCTRL register */
  44 #define SPI_RXWM(x)             ((x) & 0xffff)
  45
  46 #define SPI_IP_TXWM             0x1
  47 #define SPI_IP_RXWM             0x2
  48
  49 #define SPI_FCTRL_EN            0x1
  50
  51 #define SPI_INSN_CMD_EN         0x1
  52 #define SPI_INSN_ADDR_LEN(x)    (((x) & 0x7) << 1)
  53 #define SPI_INSN_PAD_CNT(x)     (((x) & 0xf) << 4)
  54 #define SPI_INSN_CMD_PROTO(x)   (((x) & 0x3) << 8)
  55 #define SPI_INSN_ADDR_PROTO(x)  (((x) & 0x3) << 10)
  56 #define SPI_INSN_DATA_PROTO(x)  (((x) & 0x3) << 12)
  57 #define SPI_INSN_CMD_CODE(x)    (((x) & 0xff) << 16)
  58 #define SPI_INSN_PAD_CODE(x)    (((x) & 0xff) << 24)
  59
  60 #define SPI_TXFIFO_FULL  (1 << 31)
  61 #define SPI_RXFIFO_EMPTY (1 << 31)
  62
  63 /* Values */
  64
  65 #define SPI_CSMODE_AUTO         0
  66 #define SPI_CSMODE_HOLD         2
  67 #define SPI_CSMODE_OFF          3
  68
  69 #define SPI_DIR_RX              0
  70 #define SPI_DIR_TX              1
  71
  72 #define SPI_PROTO_S             0
  73 #define SPI_PROTO_D             1
  74 #define SPI_PROTO_Q             2
  75
  76 #define SPI_ENDIAN_MSB          0
  77 #define SPI_ENDIAN_LSB          1
  78
  79 #endif /* _SIFIVE_SPI_H */