cr_file.vhdl

   1 library ieee;
   2 use ieee.std_logic_1164.all;
   3 use ieee.numeric_std.all;
   4
   5 library work;
   6 use work.common.all;
   7
   8 entity cr_file is
   9     port(
  10         clk   : in std_logic;
  11
  12         d_in  : in Decode2ToCrFileType;
  13         d_out : out CrFileToDecode2Type;
  14
  15         w_in  : in WritebackToCrFileType
  16         );
  17 end entity cr_file;
  18
  19 architecture behaviour of cr_file is
  20     signal crs : std_ulogic_vector(31 downto 0) := (others => '0');
  21     signal crs_updated : std_ulogic_vector(31 downto 0) := (others => '0');
  22 begin
  23     cr_create_0: process(all)
  24         variable hi, lo : integer := 0;
  25         variable cr_tmp : std_ulogic_vector(31 downto 0) := (others => '0');
  26     begin
  27         cr_tmp := crs;
  28
  29         for i in 0 to 7 loop
  30             if w_in.write_cr_mask(i) = '1' then
  31                 lo := i*4;
  32                 hi := lo + 3;
  33                 cr_tmp(hi downto lo) := w_in.write_cr_data(hi downto lo);
  34             end if;
  35         end loop;
  36
  37         crs_updated <= cr_tmp;
  38     end process;
  39
  40     -- synchronous writes
  41     cr_write_0: process(clk)
  42     begin
  43         if rising_edge(clk) then
  44             if w_in.write_cr_enable = '1' then
  45                 report "Writing " & to_hstring(w_in.write_cr_data) & " to CR mask " & to_hstring(w_in.write_cr_mask);
  46                 crs <= crs_updated;
  47             end if;
  48         end if;
  49     end process;
  50
  51     -- asynchronous reads
  52     cr_read_0: process(all)
  53     begin
  54         -- just return the entire CR to make mfcrf easier for now
  55         if d_in.read = '1' then
  56             report "Reading CR " & to_hstring(crs_updated);
  57         end if;
  58         d_out.read_cr_data <= crs_updated;
  59     end process;
  60 end architecture behaviour;