Add basic XER support
[microwatt.git] / cr_file.vhdl
1 library ieee;
2 use ieee.std_logic_1164.all;
3 use ieee.numeric_std.all;
4
5 library work;
6 use work.common.all;
7
8 entity cr_file is
9 port(
10 clk : in std_logic;
11
12 d_in : in Decode2ToCrFileType;
13 d_out : out CrFileToDecode2Type;
14
15 w_in : in WritebackToCrFileType
16 );
17 end entity cr_file;
18
19 architecture behaviour of cr_file is
20 signal crs : std_ulogic_vector(31 downto 0) := (others => '0');
21 signal crs_updated : std_ulogic_vector(31 downto 0);
22 signal xerc : xer_common_t := xerc_init;
23 signal xerc_updated : xer_common_t;
24 begin
25 cr_create_0: process(all)
26 variable hi, lo : integer := 0;
27 variable cr_tmp : std_ulogic_vector(31 downto 0) := (others => '0');
28 begin
29 cr_tmp := crs;
30
31 for i in 0 to 7 loop
32 if w_in.write_cr_mask(i) = '1' then
33 lo := i*4;
34 hi := lo + 3;
35 cr_tmp(hi downto lo) := w_in.write_cr_data(hi downto lo);
36 end if;
37 end loop;
38
39 crs_updated <= cr_tmp;
40
41 if w_in.write_xerc_enable = '1' then
42 xerc_updated <= w_in.write_xerc_data;
43 else
44 xerc_updated <= xerc;
45 end if;
46
47 end process;
48
49 -- synchronous writes
50 cr_write_0: process(clk)
51 begin
52 if rising_edge(clk) then
53 if w_in.write_cr_enable = '1' then
54 report "Writing " & to_hstring(w_in.write_cr_data) & " to CR mask " & to_hstring(w_in.write_cr_mask);
55 crs <= crs_updated;
56 end if;
57 if w_in.write_xerc_enable = '1' then
58 report "Writing XERC";
59 xerc <= xerc_updated;
60 end if;
61 end if;
62 end process;
63
64 -- asynchronous reads
65 cr_read_0: process(all)
66 begin
67 -- just return the entire CR to make mfcrf easier for now
68 if d_in.read = '1' then
69 report "Reading CR " & to_hstring(crs_updated);
70 end if;
71 d_out.read_cr_data <= crs_updated;
72 d_out.read_xerc_data <= xerc_updated;
73 end process;
74 end architecture behaviour;