decode_types.vhdl

   1 library ieee;
   2 use ieee.std_logic_1164.all;
   3
   4 package decode_types is
   5     type insn_type_t is (OP_ILLEGAL, OP_NOP, OP_ADD,
   6                          OP_ATTN, OP_B, OP_BC, OP_BCREG,
   7                          OP_BCD, OP_BPERM, OP_BREV,
   8                          OP_CMP, OP_CMPB, OP_CMPEQB, OP_CMPRB,
   9                          OP_CNTZ, OP_CROP,
  10                          OP_DARN, OP_DCBF, OP_DCBST, OP_DCBT, OP_DCBTST,
  11                          OP_DCBZ, OP_ICBI, OP_ICBT,
  12                          OP_FP_CMP, OP_FP_ARITH, OP_FP_MOVE, OP_FP_MISC,
  13                          OP_DIV, OP_DIVE, OP_MOD,
  14                          OP_EXTS, OP_EXTSWSLI,
  15                          OP_ISEL, OP_ISYNC,
  16                          OP_LOGIC,
  17                          OP_LOAD, OP_STORE,
  18                          OP_MCRXRX, OP_MFCR, OP_MFMSR, OP_MFSPR,
  19                          OP_MTCRF, OP_MTMSRD, OP_MTSPR, OP_MUL_L64,
  20                          OP_MUL_H64, OP_MUL_H32,
  21                          OP_POPCNT, OP_PRTY, OP_RFID,
  22                          OP_RLC, OP_RLCL, OP_RLCR, OP_SC, OP_SETB,
  23                          OP_SHL, OP_SHR,
  24                          OP_SYNC, OP_TLBIE, OP_TRAP,
  25                          OP_XOR,
  26                          OP_ADDG6S,
  27                          OP_FETCH_FAILED
  28                          );
  29
  30     -- The following list is ordered in such a way that we can know some
  31     -- things about which registers are accessed by an instruction by its place
  32     -- in the list.  In other words we can decide whether an instruction
  33     -- accesses FPRs and whether it has an RB operand by doing simple
  34     -- comparisons of the insn_code for the instruction with a few constants.
  35     type insn_code is (
  36         -- The following instructions don't have an RB operand or access FPRs
  37         INSN_illegal, -- 0
  38         INSN_fetch_fail,
  39         INSN_prefix,
  40         INSN_pnop,
  41         INSN_addic,
  42         INSN_addic_dot,
  43         INSN_addis,
  44         INSN_addme,
  45         INSN_addpcis,
  46         INSN_addze,
  47         INSN_andi_dot, -- 10
  48         INSN_andis_dot,
  49         INSN_attn,
  50         INSN_b,
  51         INSN_bc,
  52         INSN_bcctr,
  53         INSN_bclr,
  54         INSN_bctar,
  55         INSN_brh,
  56         INSN_brw,
  57         INSN_brd, -- 20
  58         INSN_cbcdtd,
  59         INSN_cdtbcd,
  60         INSN_cmpi,
  61         INSN_cmpli,
  62         INSN_cntlzw,
  63         INSN_cntlzd,
  64         INSN_cnttzw,
  65         INSN_cnttzd,
  66         INSN_crand,
  67         INSN_crandc, -- 30
  68         INSN_creqv,
  69         INSN_crnand,
  70         INSN_crnor,
  71         INSN_cror,
  72         INSN_crorc,
  73         INSN_crxor,
  74         INSN_darn,
  75         INSN_eieio,
  76         INSN_extsb,
  77         INSN_extsh, -- 40
  78         INSN_extsw,
  79         INSN_extswsli,
  80         INSN_isync,
  81         INSN_lbzu,
  82         INSN_ld,
  83         INSN_ldu,
  84         INSN_lhau,
  85         INSN_lwa,
  86         INSN_lwzu,
  87         INSN_mcrf, -- 50
  88         INSN_mcrxrx,
  89         INSN_mfcr,
  90         INSN_mfmsr,
  91         INSN_mfspr,
  92         INSN_mtcrf,
  93         INSN_mtmsr,
  94         INSN_mtmsrd,
  95         INSN_mtspr,
  96         INSN_mulli,
  97         INSN_neg, -- 60
  98         INSN_nop,
  99         INSN_ori,
 100         INSN_oris,
 101         INSN_popcntb,
 102         INSN_popcntw,
 103         INSN_popcntd,
 104         INSN_prtyw,
 105         INSN_prtyd,
 106         INSN_rfid,
 107         INSN_rldic, -- 70
 108         INSN_rldicl,
 109         INSN_rldicr,
 110         INSN_rldimi,
 111         INSN_rlwimi,
 112         INSN_rlwinm,
 113         INSN_sc,
 114         INSN_setb,
 115         INSN_slbia,
 116         INSN_sradi,
 117         INSN_srawi, -- 80
 118         INSN_stbu,
 119         INSN_std,
 120         INSN_stdu,
 121         INSN_sthu,
 122         INSN_stwu,
 123         INSN_subfic,
 124         INSN_subfme,
 125         INSN_subfze,
 126         INSN_sync,
 127         INSN_tdi, -- 90
 128         INSN_tlbsync,
 129         INSN_twi,
 130         INSN_wait,
 131         INSN_xori,
 132         INSN_xoris,
 133
 134         -- Non-prefixed instructions that have a MLS:D prefixed form and
 135         -- their corresponding prefixed instructions.
 136         -- The non-prefixed versions have even indexes so that we can
 137         -- convert them to the prefixed version by setting bit 0
 138         INSN_addi, -- 96
 139         INSN_paddi,
 140         INSN_lbz,
 141         INSN_plbz,
 142         INSN_lha, -- 100
 143         INSN_plha,
 144         INSN_lhz,
 145         INSN_plhz,
 146         INSN_lwz,
 147         INSN_plwz,
 148         INSN_stb,
 149         INSN_pstb,
 150         INSN_sth,
 151         INSN_psth,
 152         INSN_stw, -- 110
 153         INSN_pstw,
 154
 155         -- Slots for non-prefixed opcodes that are 8LS:D when prefixed
 156         INSN_lhzu, -- 112
 157         INSN_plwa,
 158         INSN_op57,
 159         INSN_pld,
 160         INSN_op61,
 161         INSN_pstd,
 162
 163         -- pad to 128 to simplify comparison logic
 164         INSN_076, INSN_077,
 165         INSN_078, INSN_079, INSN_07a, INSN_07b, INSN_07c, INSN_07d, INSN_07e, INSN_07f,
 166
 167         -- The following instructions have an RB operand but don't access FPRs
 168         INSN_add,
 169         INSN_addc,
 170         INSN_adde, -- 130
 171         INSN_addex,
 172         INSN_addg6s,
 173         INSN_and,
 174         INSN_andc,
 175         INSN_bperm,
 176         INSN_cmp,
 177         INSN_cmpb,
 178         INSN_cmpeqb,
 179         INSN_cmpl,
 180         INSN_cmprb, -- 140
 181         INSN_dcbf,
 182         INSN_dcbst,
 183         INSN_dcbt,
 184         INSN_dcbtst,
 185         INSN_dcbz,
 186         INSN_divd,
 187         INSN_divdu,
 188         INSN_divde,
 189         INSN_divdeu,
 190         INSN_divw, -- 150
 191         INSN_divwu,
 192         INSN_divwe,
 193         INSN_divweu,
 194         INSN_eqv,
 195         INSN_icbi,
 196         INSN_icbt,
 197         INSN_isel,
 198         INSN_lbarx,
 199         INSN_lbzcix,
 200         INSN_lbzux, -- 160
 201         INSN_lbzx,
 202         INSN_ldarx,
 203         INSN_ldbrx,
 204         INSN_ldcix,
 205         INSN_ldx,
 206         INSN_ldux,
 207         INSN_lharx,
 208         INSN_lhax,
 209         INSN_lhaux,
 210         INSN_lhbrx, -- 170
 211         INSN_lhzcix,
 212         INSN_lhzx,
 213         INSN_lhzux,
 214         INSN_lwarx,
 215         INSN_lwax,
 216         INSN_lwaux,
 217         INSN_lwbrx,
 218         INSN_lwzcix,
 219         INSN_lwzx,
 220         INSN_lwzux, -- 180
 221         INSN_modsd,
 222         INSN_modsw,
 223         INSN_moduw,
 224         INSN_modud,
 225         INSN_mulhw,
 226         INSN_mulhwu,
 227         INSN_mulhd,
 228         INSN_mulhdu,
 229         INSN_mullw,
 230         INSN_mulld, -- 190
 231         INSN_nand,
 232         INSN_nor,
 233         INSN_or,
 234         INSN_orc,
 235         INSN_rldcl,
 236         INSN_rldcr,
 237         INSN_rlwnm,
 238         INSN_slw,
 239         INSN_sld,
 240         INSN_sraw, -- 200
 241         INSN_srad,
 242         INSN_srw,
 243         INSN_srd,
 244         INSN_stbcix,
 245         INSN_stbcx,
 246         INSN_stbx,
 247         INSN_stbux,
 248         INSN_stdbrx,
 249         INSN_stdcix,
 250         INSN_stdcx, -- 210
 251         INSN_stdx,
 252         INSN_stdux,
 253         INSN_sthbrx,
 254         INSN_sthcix,
 255         INSN_sthcx,
 256         INSN_sthx,
 257         INSN_sthux,
 258         INSN_stwbrx,
 259         INSN_stwcix,
 260         INSN_stwcx, -- 220
 261         INSN_stwx,
 262         INSN_stwux,
 263         INSN_subf,
 264         INSN_subfc,
 265         INSN_subfe,
 266         INSN_td,
 267         INSN_tlbie,
 268         INSN_tlbiel,
 269         INSN_tw,
 270         INSN_xor, -- 230
 271
 272         -- pad to 232 to simplify comparison logic
 273         INSN_231,
 274
 275         -- The following instructions have a third input addressed by RC
 276         INSN_maddld,
 277         INSN_maddhd,
 278         INSN_maddhdu,
 279
 280         -- pad to 256 to simplify comparison logic
 281         INSN_235,
 282         INSN_236, INSN_237, INSN_238, INSN_239,
 283         INSN_240, INSN_241, INSN_242, INSN_243,
 284         INSN_244, INSN_245, INSN_246, INSN_247,
 285         INSN_248, INSN_249, INSN_250, INSN_251,
 286         INSN_252, INSN_253, INSN_254, INSN_255,
 287
 288         -- The following instructions access floating-point registers
 289         -- They have an FRS operand, but RA/RB are GPRs
 290
 291         -- Non-prefixed floating-point loads and stores that have a MLS:D
 292         -- prefixed form, and their corresponding prefixed instructions.
 293         INSN_stfd, -- 256
 294         INSN_pstfd,
 295         INSN_stfs,
 296         INSN_pstfs,
 297         INSN_lfd, -- 260
 298         INSN_plfd,
 299         INSN_lfs,
 300         INSN_plfs,
 301
 302         -- opcodes that can't have a prefix
 303         INSN_stfdu, -- 264
 304         INSN_stfsu,
 305         INSN_stfdux,
 306         INSN_stfdx,
 307         INSN_stfiwx,
 308         INSN_stfsux,
 309         INSN_stfsx, -- 270
 310         -- These ones don't actually have an FRS operand (rather an FRT destination)
 311         -- but are here so that all FP instructions are >= INST_first_frs.
 312         INSN_lfdu,
 313         INSN_lfsu,
 314         INSN_lfdx,
 315         INSN_lfdux,
 316         INSN_lfiwax,
 317         INSN_lfiwzx,
 318         INSN_lfsx,
 319         INSN_lfsux,
 320         -- These are here in order to keep the FP instructions together
 321         INSN_mcrfs,
 322         INSN_mtfsb, -- 280
 323         INSN_mtfsfi,
 324         INSN_282, -- padding
 325         INSN_283,
 326         INSN_284,
 327         INSN_285,
 328         INSN_286,
 329         INSN_287,
 330
 331         -- The following instructions access FRA and/or FRB operands
 332         INSN_fabs, -- 288
 333         INSN_fadd,
 334         INSN_fadds, -- 290
 335         INSN_fcfid,
 336         INSN_fcfids,
 337         INSN_fcfidu,
 338         INSN_fcfidus,
 339         INSN_fcmpo,
 340         INSN_fcmpu,
 341         INSN_fcpsgn,
 342         INSN_fctid,
 343         INSN_fctidz,
 344         INSN_fctidu, -- 300
 345         INSN_fctiduz,
 346         INSN_fctiw,
 347         INSN_fctiwz,
 348         INSN_fctiwu,
 349         INSN_fctiwuz,
 350         INSN_fdiv,
 351         INSN_fdivs,
 352         INSN_fmr,
 353         INSN_fmrgew,
 354         INSN_fmrgow, -- 310
 355         INSN_fnabs,
 356         INSN_fneg,
 357         INSN_fre,
 358         INSN_fres,
 359         INSN_frim,
 360         INSN_frin,
 361         INSN_frip,
 362         INSN_friz,
 363         INSN_frsp,
 364         INSN_frsqrte, -- 320
 365         INSN_frsqrtes,
 366         INSN_fsqrt,
 367         INSN_fsqrts,
 368         INSN_fsub,
 369         INSN_fsubs,
 370         INSN_ftdiv,
 371         INSN_ftsqrt,
 372         INSN_mffs,
 373         INSN_mtfsf,
 374
 375         -- pad to 336
 376         INSN_330, INSN_331, INSN_332, INSN_333, INSN_334, INSN_335,
 377
 378         -- The following instructions access FRA, FRB (possibly) and FRC operands
 379         INSN_fmul, -- 336
 380         INSN_fmuls,
 381         INSN_fmadd,
 382         INSN_fmadds,
 383         INSN_fmsub, -- 340
 384         INSN_fmsubs,
 385         INSN_fnmadd,
 386         INSN_fnmadds,
 387         INSN_fnmsub,
 388         INSN_fnmsubs,
 389         INSN_fsel
 390         );
 391
 392     constant INSN_first_rb : insn_code := INSN_add;
 393     constant INSN_first_rc : insn_code := INSN_maddld;
 394     constant INSN_first_frs : insn_code := INSN_stfd;
 395     constant INSN_first_frab : insn_code := INSN_fabs;
 396     constant INSN_first_frabc : insn_code := INSN_fmul;
 397     constant INSN_first_mls : insn_code := INSN_addi;
 398     constant INSN_first_8ls : insn_code := INSN_lhzu;
 399     constant INSN_first_fp_mls : insn_code := INSN_stfd;
 400     constant INSN_first_fp_nonmls : insn_code := INSN_stfdu;
 401
 402     type input_reg_a_t is (NONE, RA, RA_OR_ZERO, RA0_OR_CIA, CIA, FRA);
 403     type input_reg_b_t is (NONE, RB, CONST_UI, CONST_SI, CONST_SI_HI, CONST_UI_HI, CONST_LI, CONST_BD,
 404                            CONST_DXHI4, CONST_DS, CONST_DQ, CONST_M1, CONST_SH, CONST_SH32, CONST_PSI, FRB);
 405     type input_reg_c_t is (NONE, RS, RCR, FRC, FRS);
 406     type output_reg_a_t is (NONE, RT, RA, FRT);
 407     type rc_t is (NONE, ONE, RC, RCOE);
 408     type carry_in_t is (ZERO, CA, OV, ONE);
 409
 410     constant SH_OFFSET : integer := 0;
 411     constant MB_OFFSET : integer := 1;
 412     constant ME_OFFSET : integer := 1;
 413     constant SH32_OFFSET : integer := 0;
 414     constant MB32_OFFSET : integer := 1;
 415     constant ME32_OFFSET : integer := 2;
 416
 417     constant FXM_OFFSET : integer := 0;
 418
 419     constant BO_OFFSET : integer := 0;
 420     constant BI_OFFSET : integer := 1;
 421     constant BH_OFFSET : integer := 2;
 422
 423     constant BF_OFFSET : integer := 0;
 424     constant L_OFFSET  : integer := 1;
 425
 426     constant TOO_OFFSET : integer := 0;
 427
 428     type unit_t is (ALU, LDST, FPU);
 429     type facility_t is (NONE, FPU);
 430     type length_t is (NONE, is1B, is2B, is4B, is8B);
 431
 432     type repeat_t is (NONE,      -- instruction is not repeated
 433                       DUPD);     -- update-form load
 434
 435     type decode_rom_t is record
 436         unit         : unit_t;
 437         facility     : facility_t;
 438         insn_type    : insn_type_t;
 439         input_reg_a  : input_reg_a_t;
 440         input_reg_b  : input_reg_b_t;
 441         input_reg_c  : input_reg_c_t;
 442         output_reg_a : output_reg_a_t;
 443
 444         input_cr     : std_ulogic;
 445         output_cr    : std_ulogic;
 446
 447         invert_a     : std_ulogic;
 448         invert_out   : std_ulogic;
 449         input_carry  : carry_in_t;
 450         output_carry : std_ulogic;
 451
 452         -- load/store signals
 453         length       : length_t;
 454         byte_reverse : std_ulogic;
 455         sign_extend  : std_ulogic;
 456         update       : std_ulogic;
 457         reserve      : std_ulogic;
 458
 459         -- multiplier and ALU signals
 460         is_32bit     : std_ulogic;
 461         is_signed    : std_ulogic;
 462
 463         rc           : rc_t;
 464         lr           : std_ulogic;
 465
 466         sgl_pipe     : std_ulogic;
 467         repeat       : repeat_t;
 468     end record;
 469     constant decode_rom_init : decode_rom_t := (unit => ALU, facility => NONE,
 470                                                 insn_type => OP_ILLEGAL, input_reg_a => NONE,
 471                                                 input_reg_b => NONE, input_reg_c => NONE,
 472                                                 output_reg_a => NONE, input_cr => '0', output_cr => '0',
 473                                                 invert_a => '0', invert_out => '0', input_carry => ZERO, output_carry => '0',
 474                                                 length => NONE, byte_reverse => '0', sign_extend => '0',
 475                                                 update => '0', reserve => '0', is_32bit => '0',
 476                                                 is_signed => '0', rc => NONE, lr => '0', sgl_pipe => '0', repeat => NONE);
 477
 478 end decode_types;
 479
 480 package body decode_types is
 481 end decode_types;