Remove sim_config instruction
[microwatt.git] / decode_types.vhdl
1 library ieee;
2 use ieee.std_logic_1164.all;
3
4 package decode_types is
5 type insn_type_t is (OP_ILLEGAL, OP_NOP, OP_ADD,
6 OP_ADDPCIS, OP_AND, OP_ATTN, OP_B, OP_BC, OP_BCREG,
7 OP_BPERM, OP_CMP, OP_CMPB, OP_CMPEQB, OP_CMPRB,
8 OP_CNTZ, OP_CROP,
9 OP_DARN, OP_DCBF, OP_DCBST, OP_DCBT, OP_DCBTST,
10 OP_DCBZ, OP_DIV, OP_DIVE, OP_EXTS,
11 OP_EXTSWSLI, OP_ICBI, OP_ICBT, OP_ISEL, OP_ISYNC,
12 OP_LOAD, OP_STORE, OP_MADDHD, OP_MADDHDU, OP_MADDLD,
13 OP_MCRXR, OP_MCRXRX, OP_MFCR, OP_MFMSR, OP_MFSPR, OP_MOD,
14 OP_MTCRF, OP_MTMSRD, OP_MTSPR, OP_MUL_L64,
15 OP_MUL_H64, OP_MUL_H32, OP_OR,
16 OP_POPCNT, OP_PRTY, OP_RFID,
17 OP_RLC, OP_RLCL, OP_RLCR, OP_SC, OP_SETB,
18 OP_SHL, OP_SHR,
19 OP_SYNC, OP_TRAP,
20 OP_XOR
21 );
22 type input_reg_a_t is (NONE, RA, RA_OR_ZERO, SPR);
23 type input_reg_b_t is (NONE, RB, CONST_UI, CONST_SI, CONST_SI_HI, CONST_UI_HI, CONST_LI, CONST_BD, CONST_DS, CONST_M1, CONST_SH, CONST_SH32, SPR);
24 type input_reg_c_t is (NONE, RS);
25 type output_reg_a_t is (NONE, RT, RA, SPR);
26 type rc_t is (NONE, ONE, RC);
27 type carry_in_t is (ZERO, CA, ONE);
28
29 constant SH_OFFSET : integer := 0;
30 constant MB_OFFSET : integer := 1;
31 constant ME_OFFSET : integer := 1;
32 constant SH32_OFFSET : integer := 0;
33 constant MB32_OFFSET : integer := 1;
34 constant ME32_OFFSET : integer := 2;
35
36 constant FXM_OFFSET : integer := 0;
37
38 constant BO_OFFSET : integer := 0;
39 constant BI_OFFSET : integer := 1;
40 constant BH_OFFSET : integer := 2;
41
42 constant BF_OFFSET : integer := 0;
43 constant L_OFFSET : integer := 1;
44
45 constant TOO_OFFSET : integer := 0;
46
47 type unit_t is (NONE, ALU, LDST);
48 type length_t is (NONE, is1B, is2B, is4B, is8B);
49
50 type decode_rom_t is record
51 unit : unit_t;
52 insn_type : insn_type_t;
53 input_reg_a : input_reg_a_t;
54 input_reg_b : input_reg_b_t;
55 input_reg_c : input_reg_c_t;
56 output_reg_a : output_reg_a_t;
57
58 input_cr : std_ulogic;
59 output_cr : std_ulogic;
60
61 invert_a : std_ulogic;
62 invert_out : std_ulogic;
63 input_carry : carry_in_t;
64 output_carry : std_ulogic;
65
66 -- load/store signals
67 length : length_t;
68 byte_reverse : std_ulogic;
69 sign_extend : std_ulogic;
70 update : std_ulogic;
71 reserve : std_ulogic;
72
73 -- multiplier and ALU signals
74 is_32bit : std_ulogic;
75 is_signed : std_ulogic;
76
77 rc : rc_t;
78 lr : std_ulogic;
79
80 sgl_pipe : std_ulogic;
81 end record;
82 constant decode_rom_init : decode_rom_t := (unit => NONE,
83 insn_type => OP_ILLEGAL, input_reg_a => NONE,
84 input_reg_b => NONE, input_reg_c => NONE,
85 output_reg_a => NONE, input_cr => '0', output_cr => '0',
86 invert_a => '0', invert_out => '0', input_carry => ZERO, output_carry => '0',
87 length => NONE, byte_reverse => '0', sign_extend => '0',
88 update => '0', reserve => '0', is_32bit => '0',
89 is_signed => '0', rc => NONE, lr => '0', sgl_pipe => '0');
90
91 end decode_types;
92
93 package body decode_types is
94 end decode_types;