Merge pull request #104 from paulusmack/master
[microwatt.git] / decode_types.vhdl
1 library ieee;
2 use ieee.std_logic_1164.all;
3
4 package decode_types is
5 type insn_type_t is (OP_ILLEGAL, OP_NOP, OP_ADD,
6 OP_ADDPCIS, OP_AND, OP_ATTN, OP_B, OP_BC, OP_BCREG,
7 OP_BPERM, OP_CMP, OP_CMPB, OP_CMPEQB, OP_CMPL, OP_CMPRB,
8 OP_CNTZ, OP_CRAND,
9 OP_CRANDC, OP_CREQV, OP_CRNAND, OP_CRNOR, OP_CROR, OP_CRORC,
10 OP_CRXOR, OP_DARN, OP_DCBF, OP_DCBST, OP_DCBT, OP_DCBTST,
11 OP_DCBZ, OP_DIV, OP_EXTSB, OP_EXTSH, OP_EXTSW,
12 OP_EXTSWSLI, OP_ICBI, OP_ICBT, OP_ISEL, OP_ISYNC,
13 OP_LOAD, OP_STORE, OP_MADDHD, OP_MADDHDU, OP_MADDLD, OP_MCRF,
14 OP_MCRXR, OP_MCRXRX, OP_MFCR, OP_MFSPR, OP_MOD,
15 OP_MTCRF, OP_MTSPR, OP_MUL_L64,
16 OP_MUL_H64, OP_MUL_H32, OP_OR,
17 OP_POPCNTB, OP_POPCNTD, OP_POPCNTW, OP_PRTYD,
18 OP_PRTYW, OP_RLC, OP_RLCL, OP_RLCR, OP_SETB,
19 OP_SHL, OP_SHR,
20 OP_SYNC, OP_TD, OP_TDI, OP_TW,
21 OP_TWI, OP_XOR, OP_SIM_CONFIG);
22
23 type input_reg_a_t is (NONE, RA, RA_OR_ZERO);
24 type input_reg_b_t is (NONE, RB, CONST_UI, CONST_SI, CONST_SI_HI, CONST_UI_HI, CONST_LI, CONST_BD, CONST_DS, CONST_M1, CONST_SH, CONST_SH32);
25 type input_reg_c_t is (NONE, RS);
26 type output_reg_a_t is (NONE, RT, RA);
27 type rc_t is (NONE, ONE, RC);
28 type carry_in_t is (ZERO, CA, ONE);
29
30 constant SH_OFFSET : integer := 0;
31 constant MB_OFFSET : integer := 1;
32 constant ME_OFFSET : integer := 1;
33 constant SH32_OFFSET : integer := 0;
34 constant MB32_OFFSET : integer := 1;
35 constant ME32_OFFSET : integer := 2;
36
37 constant FXM_OFFSET : integer := 0;
38
39 constant BO_OFFSET : integer := 0;
40 constant BI_OFFSET : integer := 1;
41 constant BH_OFFSET : integer := 2;
42
43 constant BF_OFFSET : integer := 0;
44 constant L_OFFSET : integer := 1;
45
46 constant TOO_OFFSET : integer := 0;
47
48 type unit_t is (NONE, ALU, LDST, MUL, DIV);
49 type length_t is (NONE, is1B, is2B, is4B, is8B);
50
51 type decode_rom_t is record
52 unit : unit_t;
53 insn_type : insn_type_t;
54 input_reg_a : input_reg_a_t;
55 input_reg_b : input_reg_b_t;
56 input_reg_c : input_reg_c_t;
57 output_reg_a : output_reg_a_t;
58
59 input_cr : std_ulogic;
60 output_cr : std_ulogic;
61
62 invert_a : std_ulogic;
63 invert_out : std_ulogic;
64 input_carry : carry_in_t;
65 output_carry : std_ulogic;
66
67 -- load/store signals
68 length : length_t;
69 byte_reverse : std_ulogic;
70 sign_extend : std_ulogic;
71 update : std_ulogic;
72 reserve : std_ulogic;
73
74 -- multiplier and ALU signals
75 is_32bit : std_ulogic;
76 is_signed : std_ulogic;
77
78 rc : rc_t;
79 lr : std_ulogic;
80
81 sgl_pipe : std_ulogic;
82 end record;
83 constant decode_rom_init : decode_rom_t := (unit => NONE,
84 insn_type => OP_ILLEGAL, input_reg_a => NONE,
85 input_reg_b => NONE, input_reg_c => NONE,
86 output_reg_a => NONE, input_cr => '0', output_cr => '0',
87 invert_a => '0', invert_out => '0', input_carry => ZERO, output_carry => '0',
88 length => NONE, byte_reverse => '0', sign_extend => '0',
89 update => '0', reserve => '0', is_32bit => '0',
90 is_signed => '0', rc => NONE, lr => '0', sgl_pipe => '0');
91
92 end decode_types;
93
94 package body decode_types is
95 end decode_types;