examples/basic/sel.py

   1 from types import SimpleNamespace
   2 from nmigen import *
   3 from nmigen.cli import main
   4
   5
   6 class FlatGPIO(Elaboratable):
   7     def __init__(self, pins, bus):
   8         self.pins = pins
   9         self.bus  = bus
  10
  11     def elaborate(self, platform):
  12         bus  = self.bus
  13
  14         m = Module()
  15         m.d.comb += bus.r_data.eq(self.pins.word_select(bus.addr, len(bus.r_data)))
  16         with m.If(bus.we):
  17             m.d.sync += self.pins.word_select(bus.addr, len(bus.w_data)).eq(bus.w_data)
  18         return m
  19
  20
  21 if __name__ == "__main__":
  22     bus = Record([
  23         ("addr",   3),
  24         ("r_data", 2),
  25         ("w_data", 2),
  26         ("we",     1),
  27     ])
  28     pins = Signal(8)
  29     gpio = FlatGPIO(pins, bus)
  30     main(gpio, ports=[pins, bus.addr, bus.r_data, bus.w_data, bus.we])