experiments9/tsmc_c018/coriolis2/settings.py

   1 # -*- Mode:Python -*-
   2
   3 from   __future__ import print_function
   4 import os
   5 import socket
   6 import helpers
   7
   8 NdaDirectory = None
   9 if os.environ.has_key('NDA_TOP'):
  10     NdaDirectory = os.environ['NDA_TOP']
  11 if not NdaDirectory:
  12     hostname = socket.gethostname()
  13     if hostname.startswith('lepka'):
  14         NdaDirectory = '/dsk/l1/jpc/crypted/soc/techno'
  15         if not os.path.isdir(NdaDirectory):
  16             print( '[ERROR] You forgot to mount the NDA '
  17                    'encrypted directory, stupid!' )
  18     else:
  19         NdaDirectory = '/users/soft/techno/techno'
  20 helpers.setNdaTopDir( NdaDirectory )
  21
  22 import Cfg
  23 from   Hurricane import DataBase, Cell, Instance, Net
  24 from   CRL       import AllianceFramework
  25 from   helpers   import overlay, l, u, n
  26 from   NDA.node180.tsmc_c018 import (techno, FlexLib,
  27                                      LibreSOCIO, LibreSOCMem, pll)
  28
  29 techno.setup()
  30 FlexLib.setup()
  31 LibreSOCIO.setup()
  32 LibreSOCMem.setup()
  33 pll.setup()
  34
  35 # XXX TODO, important! fix the directions of the PLL cells
  36 # https://gitlab.lip6.fr/vlsi-eda/coriolis/-/issues/47
  37 def fix_pll():
  38     for cell in pll.getCells():
  39         for net in cell.getNets():
  40             # TODO: review
  41             if net.getName() == 'vdd':
  42                 net.setType( Net.Type.POWER )
  43                 net.setDirection( Net.Direction.IN )
  44             # TODO: review
  45             elif net.getName() == 'vss':
  46                 net.setType( Net.Type.GROUND )
  47                 net.setDirection( Net.Direction.IN )
  48             # TODO: review
  49             elif net.getName() == 'ck':
  50                 net.setType( Net.Type.CLOCK )
  51                 net.setDirection( Net.Direction.IN )
  52             # TODO review, should be good
  53             elif net.getName() in ['div_out_test', 'vco_test_ana', 'out_v']:
  54                 net.setDirection( Net.Direction.OUT )
  55             # last option, set it as an input
  56             else:
  57                 net.setDirection( Net.Direction.IN )
  58
  59 # XXX TODO uncomment this line: fix_pll()
  60
  61 # XXX TODO same thing for spblock_512xxxetcxxx for "q" output data
  62
  63 db = DataBase.getDB()
  64 af = AllianceFramework.get()
  65
  66
  67 def createBlackbox (name, libname, cellName, blackboxNames, real_name):
  68     global db, af
  69     print( '  o  Creating %s blackboxes for "ls180" design.' % name)
  70     rootlib  = db.getRootLibrary()
  71     lib      = rootlib.getLibrary( libname )
  72     libcell     = lib.getCell( cellName )
  73     if not libcell:
  74         raise ErrorMessage( 1, 'settings.createSramBlocks(): '
  75                                '%s SRAM Cell "%s" not found.' % \
  76                                (name, cellName) )
  77     libcell.setAbstractedSupply( True )
  78     for blackboxName in blackboxNames:
  79         cell     = Cell.create( lib, blackboxName )
  80         instance = Instance.create( cell, real_name, libcell )
  81         state    = af.getCatalog().getState( blackboxName, True )
  82         state.setCell( cell )
  83         state.setLogical( True )
  84         state.setInMemory( True )
  85         print( '     - {}.'.format(cell) )
  86         for masterNet in libcell.getNets():
  87             if not masterNet.isExternal():
  88                 continue
  89             net = Net.create( cell, masterNet.getName() )
  90             net.setDirection( masterNet.getDirection() )
  91             net.setType( masterNet.getType() )
  92             net.setExternal( True )
  93             net.setGlobal( masterNet.isGlobal() )
  94             if masterNet.isSupply():
  95                 continue
  96             plug = instance.getPlug( masterNet )
  97             plug.setNet( net )
  98
  99
 100 #TODO, JP, check this, it's cut/paste and guessing
 101 def createPLLBlackbox ():
 102     createBlackbox(name='PLL',
 103                    libname='pll',
 104                    cellName='pll',
 105                    blackboxeNames = [ 'pll'
 106                                      ],
 107                    real_name='real_pll') # probably
 108
 109
 110 def createSramBlackbox ():
 111     createBlackbox(name='SRAM',
 112                    libname='LibreSOCMem',
 113                    cellName='spblock_512w64b8w',
 114                    # go back to only one blackbox
 115                    blackboxeNames = [ 'spblock_512w64b8w'
 116                                      ],
 117                    real_name='real_sram')
 118
 119
 120 with overlay.CfgCache(priority=Cfg.Parameter.Priority.UserFile) as cfg:
 121     cfg.misc.catchCore           = False
 122     cfg.misc.minTraceLevel       = 12300
 123     cfg.misc.maxTraceLevel       = 12400
 124     cfg.misc.info                = False
 125     cfg.misc.paranoid            = False
 126     cfg.misc.bug                 = False
 127     cfg.misc.logMode             = True
 128     cfg.misc.verboseLevel1       = True
 129     cfg.misc.verboseLevel2       = True
 130     cfg.etesian.graphics         = 3
 131     cfg.etesian.spaceMargin      = 0.10
 132     cfg.katana.eventsLimit       = 4000000
 133     env = af.getEnvironment()
 134     env.setCLOCK( '^sys_clk$|^ck|^jtag_tck$' )
 135
 136 with overlay.UpdateSession():
 137     createSramBlackbox()
 138     # createPLLBlackbox ()