7b43f71bf091016257fc58945a4b25c86ef61df8
[gcc.git] / gcc / testsuite / gcc.target / aarch64 / advsimd-intrinsics / vqrdmulh_n.c
1 #include <arm_neon.h>
2 #include "arm-neon-ref.h"
3 #include "compute-ref-data.h"
4
5 /* Expected values of cumulative_saturation flag. */
6 int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
7 int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
8 int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
9 int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
10
11 /* Expected results. */
12 VECT_VAR_DECL(expected,int,16,4) [] = { 0xfffc, 0xfffc, 0xfffc, 0xfffd };
13 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffe, 0xfffffffe };
14 VECT_VAR_DECL(expected,int,16,8) [] = { 0x6, 0x6, 0x6, 0x5,
15 0x5, 0x4, 0x4, 0x4 };
16 VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffe, 0xfffffffe,
17 0xfffffffe, 0xfffffffe };
18
19 /* Expected values of cumulative_saturation flag when multiplication
20 saturates. */
21 int VECT_VAR(expected_cumulative_sat_mul,int,16,4) = 1;
22 int VECT_VAR(expected_cumulative_sat_mul,int,32,2) = 1;
23 int VECT_VAR(expected_cumulative_sat_mul,int,16,8) = 1;
24 int VECT_VAR(expected_cumulative_sat_mul,int,32,4) = 1;
25
26 /* Expected results when multiplication saturates. */
27 VECT_VAR_DECL(expected_mul,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
28 VECT_VAR_DECL(expected_mul,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
29 VECT_VAR_DECL(expected_mul,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
30 0x7fff, 0x7fff, 0x7fff, 0x7fff };
31 VECT_VAR_DECL(expected_mul,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
32 0x7fffffff, 0x7fffffff };
33
34 /* Expected values of cumulative_saturation flag when rounding
35 should not cause saturation. */
36 int VECT_VAR(expected_cumulative_sat_round,int,16,4) = 0;
37 int VECT_VAR(expected_cumulative_sat_round,int,32,2) = 0;
38 int VECT_VAR(expected_cumulative_sat_round,int,16,8) = 0;
39 int VECT_VAR(expected_cumulative_sat_round,int,32,4) = 0;
40
41 /* Expected results when rounding should not cause saturation. */
42 VECT_VAR_DECL(expected_round,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
43 VECT_VAR_DECL(expected_round,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
44 VECT_VAR_DECL(expected_round,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
45 0x7fff, 0x7fff, 0x7fff, 0x7fff };
46 VECT_VAR_DECL(expected_round,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
47 0x7fffffff, 0x7fffffff };
48
49 #define INSN vqrdmulh
50 #define TEST_MSG "VQRDMULH_N"
51
52 #define FNNAME1(NAME) void exec_ ## NAME ## _n (void)
53 #define FNNAME(NAME) FNNAME1(NAME)
54
55 FNNAME (INSN)
56 {
57 int i;
58
59 /* vector_res = vqrdmulh_n(vector,val), then store the result. */
60 #define TEST_VQRDMULH_N2(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \
61 Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N)); \
62 VECT_VAR(vector_res, T1, W, N) = \
63 INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
64 L); \
65 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), \
66 VECT_VAR(vector_res, T1, W, N)); \
67 CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
68
69 /* Two auxliary macros are necessary to expand INSN */
70 #define TEST_VQRDMULH_N1(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \
71 TEST_VQRDMULH_N2(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT)
72
73 #define TEST_VQRDMULH_N(Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \
74 TEST_VQRDMULH_N1(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT)
75
76
77 DECL_VARIABLE(vector, int, 16, 4);
78 DECL_VARIABLE(vector, int, 32, 2);
79 DECL_VARIABLE(vector, int, 16, 8);
80 DECL_VARIABLE(vector, int, 32, 4);
81
82 DECL_VARIABLE(vector_res, int, 16, 4);
83 DECL_VARIABLE(vector_res, int, 32, 2);
84 DECL_VARIABLE(vector_res, int, 16, 8);
85 DECL_VARIABLE(vector_res, int, 32, 4);
86
87 clean_results ();
88
89 VLOAD(vector, buffer, , int, s, 16, 4);
90 VLOAD(vector, buffer, , int, s, 32, 2);
91 VLOAD(vector, buffer, q, int, s, 16, 8);
92 VLOAD(vector, buffer, q, int, s, 32, 4);
93
94 /* Choose multiplier arbitrarily. */
95 #define CMT ""
96 TEST_VQRDMULH_N(, int, s, 16, 4, 0x2233, expected_cumulative_sat, CMT);
97 TEST_VQRDMULH_N(, int, s, 32, 2, 0x12345678, expected_cumulative_sat, CMT);
98 TEST_VQRDMULH_N(q, int, s, 16, 8, 0xCD12, expected_cumulative_sat, CMT);
99 TEST_VQRDMULH_N(q, int, s, 32, 4, 0xFA23456, expected_cumulative_sat, CMT);
100
101 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
102 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
103 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
104 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
105
106 /* Now use input values such that the multiplication causes
107 saturation. */
108 #define TEST_MSG_MUL " (check mul cumulative saturation)"
109 VDUP(vector, , int, s, 16, 4, 0x8000);
110 VDUP(vector, , int, s, 32, 2, 0x80000000);
111 VDUP(vector, q, int, s, 16, 8, 0x8000);
112 VDUP(vector, q, int, s, 32, 4, 0x80000000);
113
114 TEST_VQRDMULH_N(, int, s, 16, 4, 0x8000, expected_cumulative_sat_mul,
115 TEST_MSG_MUL);
116 TEST_VQRDMULH_N(, int, s, 32, 2, 0x80000000, expected_cumulative_sat_mul,
117 TEST_MSG_MUL);
118 TEST_VQRDMULH_N(q, int, s, 16, 8, 0x8000, expected_cumulative_sat_mul,
119 TEST_MSG_MUL);
120 TEST_VQRDMULH_N(q, int, s, 32, 4, 0x80000000, expected_cumulative_sat_mul,
121 TEST_MSG_MUL);
122
123 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_mul, TEST_MSG_MUL);
124 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_mul, TEST_MSG_MUL);
125 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_mul, TEST_MSG_MUL);
126 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_mul, TEST_MSG_MUL);
127
128 /* Use input values where rounding produces a result equal to the
129 saturation value, but does not set the saturation flag. */
130 #define TEST_MSG_ROUND " (check rounding)"
131 VDUP(vector, , int, s, 16, 4, 0x8000);
132 VDUP(vector, , int, s, 32, 2, 0x80000000);
133 VDUP(vector, q, int, s, 16, 8, 0x8000);
134 VDUP(vector, q, int, s, 32, 4, 0x80000000);
135
136 TEST_VQRDMULH_N(, int, s, 16, 4, 0x8001, expected_cumulative_sat_round,
137 TEST_MSG_ROUND);
138 TEST_VQRDMULH_N(, int, s, 32, 2, 0x80000001, expected_cumulative_sat_round,
139 TEST_MSG_ROUND);
140 TEST_VQRDMULH_N(q, int, s, 16, 8, 0x8001, expected_cumulative_sat_round,
141 TEST_MSG_ROUND);
142 TEST_VQRDMULH_N(q, int, s, 32, 4, 0x80000001, expected_cumulative_sat_round,
143 TEST_MSG_ROUND);
144
145 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_round, TEST_MSG_ROUND);
146 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_round, TEST_MSG_ROUND);
147 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_round, TEST_MSG_ROUND);
148 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_round, TEST_MSG_ROUND);
149 }
150
151 int main (void)
152 {
153 exec_vqrdmulh_n ();
154 return 0;
155 }