gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c

   1 #include <arm_neon.h>
   2 #include "arm-neon-ref.h"
   3 #include "compute-ref-data.h"
   4
   5 /* Expected values of cumulative_saturation flag with negative
   6    input.  */
   7 int VECT_VAR(expected_cumulative_sat_neg,int,8,8) = 1;
   8 int VECT_VAR(expected_cumulative_sat_neg,int,16,4) = 1;
   9 int VECT_VAR(expected_cumulative_sat_neg,int,32,2) = 1;
  10 int VECT_VAR(expected_cumulative_sat_neg,int,64,1) = 1;
  11 int VECT_VAR(expected_cumulative_sat_neg,int,8,16) = 1;
  12 int VECT_VAR(expected_cumulative_sat_neg,int,16,8) = 1;
  13 int VECT_VAR(expected_cumulative_sat_neg,int,32,4) = 1;
  14 int VECT_VAR(expected_cumulative_sat_neg,int,64,2) = 1;
  15
  16 /* Expected results with negative input.  */
  17 VECT_VAR_DECL(expected_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
  18                                             0x0, 0x0, 0x0, 0x0 };
  19 VECT_VAR_DECL(expected_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
  20 VECT_VAR_DECL(expected_neg,uint,32,2) [] = { 0x0, 0x0 };
  21 VECT_VAR_DECL(expected_neg,uint,64,1) [] = { 0x0 };
  22 VECT_VAR_DECL(expected_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
  23                                              0x0, 0x0, 0x0, 0x0,
  24                                              0x0, 0x0, 0x0, 0x0,
  25                                              0x0, 0x0, 0x0, 0x0 };
  26 VECT_VAR_DECL(expected_neg,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
  27                                              0x0, 0x0, 0x0, 0x0 };
  28 VECT_VAR_DECL(expected_neg,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
  29 VECT_VAR_DECL(expected_neg,uint,64,2) [] = { 0x0, 0x0 };
  30
  31 /* Expected values of cumulative_saturation flag with shift by 1.  */
  32 int VECT_VAR(expected_cumulative_sat_sh1,int,8,8) = 0;
  33 int VECT_VAR(expected_cumulative_sat_sh1,int,16,4) = 0;
  34 int VECT_VAR(expected_cumulative_sat_sh1,int,32,2) = 0;
  35 int VECT_VAR(expected_cumulative_sat_sh1,int,64,1) = 0;
  36 int VECT_VAR(expected_cumulative_sat_sh1,int,8,16) = 0;
  37 int VECT_VAR(expected_cumulative_sat_sh1,int,16,8) = 0;
  38 int VECT_VAR(expected_cumulative_sat_sh1,int,32,4) = 0;
  39 int VECT_VAR(expected_cumulative_sat_sh1,int,64,2) = 0;
  40
  41 /* Expected results with shift by 1.  */
  42 VECT_VAR_DECL(expected_sh1,uint,8,8) [] = { 0xfe, 0xfe, 0xfe, 0xfe,
  43                                             0xfe, 0xfe, 0xfe, 0xfe };
  44 VECT_VAR_DECL(expected_sh1,uint,16,4) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe };
  45 VECT_VAR_DECL(expected_sh1,uint,32,2) [] = { 0xfffffffe, 0xfffffffe };
  46 VECT_VAR_DECL(expected_sh1,uint,64,1) [] = { 0xfffffffffffffffe };
  47 VECT_VAR_DECL(expected_sh1,uint,8,16) [] = { 0xfe, 0xfe, 0xfe, 0xfe,
  48                                              0xfe, 0xfe, 0xfe, 0xfe,
  49                                              0xfe, 0xfe, 0xfe, 0xfe,
  50                                              0xfe, 0xfe, 0xfe, 0xfe };
  51 VECT_VAR_DECL(expected_sh1,uint,16,8) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe,
  52                                              0xfffe, 0xfffe, 0xfffe, 0xfffe };
  53 VECT_VAR_DECL(expected_sh1,uint,32,4) [] = { 0xfffffffe, 0xfffffffe,
  54                                              0xfffffffe, 0xfffffffe };
  55 VECT_VAR_DECL(expected_sh1,uint,64,2) [] = { 0xfffffffffffffffe,
  56                                              0xfffffffffffffffe };
  57
  58 /* Expected values of cumulative_saturation flag with shift by 2.  */
  59 int VECT_VAR(expected_cumulative_sat_sh2,int,8,8) = 1;
  60 int VECT_VAR(expected_cumulative_sat_sh2,int,16,4) = 1;
  61 int VECT_VAR(expected_cumulative_sat_sh2,int,32,2) = 1;
  62 int VECT_VAR(expected_cumulative_sat_sh2,int,64,1) = 1;
  63 int VECT_VAR(expected_cumulative_sat_sh2,int,8,16) = 1;
  64 int VECT_VAR(expected_cumulative_sat_sh2,int,16,8) = 1;
  65 int VECT_VAR(expected_cumulative_sat_sh2,int,32,4) = 1;
  66 int VECT_VAR(expected_cumulative_sat_sh2,int,64,2) = 1;
  67
  68 /* Expected results with shift by 2.  */
  69 VECT_VAR_DECL(expected_sh2,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
  70                                             0xff, 0xff, 0xff, 0xff };
  71 VECT_VAR_DECL(expected_sh2,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
  72 VECT_VAR_DECL(expected_sh2,uint,32,2) [] = { 0xffffffff, 0xffffffff };
  73 VECT_VAR_DECL(expected_sh2,uint,64,1) [] = { 0xffffffffffffffff };
  74 VECT_VAR_DECL(expected_sh2,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
  75                                              0xff, 0xff, 0xff, 0xff,
  76                                              0xff, 0xff, 0xff, 0xff,
  77                                              0xff, 0xff, 0xff, 0xff };
  78 VECT_VAR_DECL(expected_sh2,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
  79                                              0xffff, 0xffff, 0xffff, 0xffff };
  80 VECT_VAR_DECL(expected_sh2,uint,32,4) [] = { 0xffffffff, 0xffffffff,
  81                                              0xffffffff, 0xffffffff };
  82 VECT_VAR_DECL(expected_sh2,uint,64,2) [] = { 0xffffffffffffffff,
  83                                              0xffffffffffffffff };
  84
  85 /* Expected values of cumulative_saturation flag.  */
  86 int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
  87 int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
  88 int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
  89 int VECT_VAR(expected_cumulative_sat,int,64,1) = 0;
  90 int VECT_VAR(expected_cumulative_sat,int,8,16) = 0;
  91 int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
  92 int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
  93 int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
  94
  95 /* Expected results.  */
  96 VECT_VAR_DECL(expected,uint,8,8) [] = { 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2 };
  97 VECT_VAR_DECL(expected,uint,16,4) [] = { 0x8, 0x8, 0x8, 0x8 };
  98 VECT_VAR_DECL(expected,uint,32,2) [] = { 0x18, 0x18 };
  99 VECT_VAR_DECL(expected,uint,64,1) [] = { 0x40 };
 100 VECT_VAR_DECL(expected,uint,8,16) [] = { 0xa0, 0xa0, 0xa0, 0xa0,
 101                                          0xa0, 0xa0, 0xa0, 0xa0,
 102                                          0xa0, 0xa0, 0xa0, 0xa0,
 103                                          0xa0, 0xa0, 0xa0, 0xa0 };
 104 VECT_VAR_DECL(expected,uint,16,8) [] = { 0x180, 0x180, 0x180, 0x180,
 105                                          0x180, 0x180, 0x180, 0x180 };
 106 VECT_VAR_DECL(expected,uint,32,4) [] = { 0x380, 0x380, 0x380, 0x380 };
 107 VECT_VAR_DECL(expected,uint,64,2) [] = { 0x800, 0x800 };
 108
 109
 110 #define INSN vqshlu
 111 #define TEST_MSG "VQSHLU_N/VQSHLUQ_N"
 112
 113 #define FNNAME1(NAME) void exec_ ## NAME ## _n(void)
 114 #define FNNAME(NAME) FNNAME1(NAME)
 115
 116 FNNAME (INSN)
 117 {
 118   /* Basic test: v2=vqshlu_n(v1,v), then store the result.  */
 119 #define TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
 120   Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T3, W, N));           \
 121   VECT_VAR(vector_res, T3, W, N) =                                      \
 122     INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),                     \
 123                         V);                                             \
 124   vst1##Q##_##T4##W(VECT_VAR(result, T3, W, N),                         \
 125                     VECT_VAR(vector_res, T3, W, N));                    \
 126   CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
 127
 128   /* Two auxliary macros are necessary to expand INSN */
 129 #define TEST_VQSHLU_N1(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
 130   TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
 131
 132 #define TEST_VQSHLU_N(Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
 133   TEST_VQSHLU_N1(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
 134
 135
 136   DECL_VARIABLE_ALL_VARIANTS(vector);
 137   DECL_VARIABLE_ALL_VARIANTS(vector_res);
 138
 139   clean_results ();
 140
 141   /* Fill input vector with negative values, to check saturation on
 142      limits.  */
 143   VDUP(vector, , int, s, 8, 8, -1);
 144   VDUP(vector, , int, s, 16, 4, -2);
 145   VDUP(vector, , int, s, 32, 2, -3);
 146   VDUP(vector, , int, s, 64, 1, -4);
 147   VDUP(vector, q, int, s, 8, 16, -1);
 148   VDUP(vector, q, int, s, 16, 8, -2);
 149   VDUP(vector, q, int, s, 32, 4, -3);
 150   VDUP(vector, q, int, s, 64, 2, -4);
 151
 152   /* Choose shift amount arbitrarily.  */
 153 #define CMT " (negative input)"
 154   TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 2, expected_cumulative_sat_neg, CMT);
 155   TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 1, expected_cumulative_sat_neg, CMT);
 156   TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 1, expected_cumulative_sat_neg, CMT);
 157   TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 2, expected_cumulative_sat_neg, CMT);
 158   TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 2, expected_cumulative_sat_neg, CMT);
 159   TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 1, expected_cumulative_sat_neg, CMT);
 160   TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 1, expected_cumulative_sat_neg, CMT);
 161   TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 2, expected_cumulative_sat_neg, CMT);
 162
 163   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg, CMT);
 164   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg, CMT);
 165   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg, CMT);
 166   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_neg, CMT);
 167   CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg, CMT);
 168   CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg, CMT);
 169   CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg, CMT);
 170   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_neg, CMT);
 171
 172
 173   /* Fill input vector with max value, to check saturation on
 174      limits.  */
 175   VDUP(vector, , int, s, 8, 8, 0x7F);
 176   VDUP(vector, , int, s, 16, 4, 0x7FFF);
 177   VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
 178   VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
 179   VDUP(vector, q, int, s, 8, 16, 0x7F);
 180   VDUP(vector, q, int, s, 16, 8, 0x7FFF);
 181   VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
 182   VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFULL);
 183
 184   /* shift by 1.  */
 185 #undef CMT
 186 #define CMT " (shift by 1)"
 187   TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 1, expected_cumulative_sat_sh1, CMT);
 188   TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 1, expected_cumulative_sat_sh1, CMT);
 189   TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 1, expected_cumulative_sat_sh1, CMT);
 190   TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 1, expected_cumulative_sat_sh1, CMT);
 191   TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 1, expected_cumulative_sat_sh1, CMT);
 192   TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 1, expected_cumulative_sat_sh1, CMT);
 193   TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 1, expected_cumulative_sat_sh1, CMT);
 194   TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 1, expected_cumulative_sat_sh1, CMT);
 195
 196   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh1, CMT);
 197   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh1, CMT);
 198   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh1, CMT);
 199   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh1, CMT);
 200   CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh1, CMT);
 201   CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh1, CMT);
 202   CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh1, CMT);
 203   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh1, CMT);
 204
 205   /* shift by 2 to force saturation.  */
 206 #undef CMT
 207 #define CMT " (shift by 2)"
 208   TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 2, expected_cumulative_sat_sh2, CMT);
 209   TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 2, expected_cumulative_sat_sh2, CMT);
 210   TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 2, expected_cumulative_sat_sh2, CMT);
 211   TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 2, expected_cumulative_sat_sh2, CMT);
 212   TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 2, expected_cumulative_sat_sh2, CMT);
 213   TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 2, expected_cumulative_sat_sh2, CMT);
 214   TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 2, expected_cumulative_sat_sh2, CMT);
 215   TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 2, expected_cumulative_sat_sh2, CMT);
 216
 217   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh2, CMT);
 218   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh2, CMT);
 219   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh2, CMT);
 220   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh2, CMT);
 221   CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh2, CMT);
 222   CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh2, CMT);
 223   CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh2, CMT);
 224   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh2, CMT);
 225
 226
 227   /* Fill input vector with positive values, to check normal case.  */
 228   VDUP(vector, , int, s, 8, 8, 1);
 229   VDUP(vector, , int, s, 16, 4, 2);
 230   VDUP(vector, , int, s, 32, 2, 3);
 231   VDUP(vector, , int, s, 64, 1, 4);
 232   VDUP(vector, q, int, s, 8, 16, 5);
 233   VDUP(vector, q, int, s, 16, 8, 6);
 234   VDUP(vector, q, int, s, 32, 4, 7);
 235   VDUP(vector, q, int, s, 64, 2, 8);
 236
 237   /* Arbitrary shift amount.  */
 238 #undef CMT
 239 #define CMT ""
 240   TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 1, expected_cumulative_sat, CMT);
 241   TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 2, expected_cumulative_sat, CMT);
 242   TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 3, expected_cumulative_sat, CMT);
 243   TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 4, expected_cumulative_sat, CMT);
 244   TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 5, expected_cumulative_sat, CMT);
 245   TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 6, expected_cumulative_sat, CMT);
 246   TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 7, expected_cumulative_sat, CMT);
 247   TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 8, expected_cumulative_sat, CMT);
 248
 249   CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
 250   CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
 251   CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
 252   CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
 253   CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
 254   CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
 255   CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
 256   CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
 257 }
 258
 259 int main (void)
 260 {
 261   exec_vqshlu_n ();
 262   return 0;
 263 }