1 /* Verify that overloaded built-ins for vec_insert() with short
2 inputs produce the right codegen. Power9 variant. */
4 /* { dg-do compile } */
5 /* { dg-require-effective-target powerpc_p9vector_ok } */
6 /* { dg-options "-O2 -mdejagnu-cpu=power9" } */
11 testbs_var(unsigned short x
, vector
bool short v
, signed int i
)
13 return vec_insert(x
, v
, i
);
16 testss_var(signed short x
, vector
signed short v
, signed int i
)
18 return vec_insert(x
, v
, i
);
21 testus1_var(signed short x
, vector
unsigned short v
, signed int i
)
23 return vec_insert(x
, v
, i
);
26 testus2_var(unsigned short x
, vector
unsigned short v
, signed int i
)
28 return vec_insert(x
, v
, i
);
31 testbs_cst(signed short x
, vector
bool short v
)
33 return vec_insert(x
, v
, 12);
36 testss_cst(signed short x
, vector
signed short v
)
38 return vec_insert(x
, v
, 12);
41 testus1_cst(signed short x
, vector
unsigned short v
)
43 return vec_insert(x
, v
, 12);
46 testus2_cst(unsigned short x
, vector
unsigned short v
)
48 return vec_insert(x
, v
, 12);
51 /* { dg-final { scan-assembler-times {\mmtvsrwz\M} 8 { target lp64 } } } */
52 /* { dg-final { scan-assembler-times {\mvinserth\M} 8 { target lp64 } } } */
54 /* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 0 } } */
55 /* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 0 { target lp64 }} } */
57 /* -m32 uses sth/lvehx as part of the sequence. */
58 /* { dg-final { scan-assembler-times {\msth\M} 8 { target ilp32 }} } */
59 /* { dg-final { scan-assembler-times {\mlvehx\M} 8 { target ilp32 }} } */
60 /* { dg-final { scan-assembler-times {\mvperm\M} 8 { target ilp32 }} } */
61 /* { dg-final { scan-assembler-times {\mxxperm\M} 8 { target ilp32 }} } */
62 /* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 8 { target ilp32 }} } */