gram/dfii.py

   1 # This file is Copyright (c) 2015 Sebastien Bourdeauducq <sb@m-labs.hk>
   2 # This file is Copyright (c) 2016-2019 Florent Kermarrec <florent@enjoy-digital.fr>
   3 # This file is Copyright (c) 2020 LambdaConcept <contact@lambdaconcept.com>
   4 # License: BSD
   5
   6 from nmigen import *
   7
   8 from gram.phy import dfi
   9 from gram.compat import CSRPrefixProxy
  10
  11 # PhaseInjector ------------------------------------------------------------------------------------
  12
  13
  14 class PhaseInjector(Elaboratable):
  15     def __init__(self, csr_bank, phase):
  16         self._command = csr_bank.csr(6, "w")
  17         self._command_issue = csr_bank.csr(1, "w")
  18         self._address = csr_bank.csr(len(phase.address), "w")
  19         self._baddress = csr_bank.csr(len(phase.bank), "w")
  20         self._wrdata = csr_bank.csr(len(phase.wrdata), "w")
  21         self._rddata = csr_bank.csr(len(phase.rddata), "r")
  22
  23         self._phase = phase
  24
  25     def elaborate(self, platform):
  26         m = Module()
  27
  28         m.d.comb += [
  29             self._phase.address.eq(self._address.w_data),
  30             self._phase.bank.eq(self._baddress.w_data),
  31             self._phase.wrdata_en.eq(self._command_issue.w_stb & self._command.w_data[4]),
  32             self._phase.rddata_en.eq(self._command_issue.w_stb & self._command.w_data[5]),
  33             self._phase.wrdata.eq(self._wrdata.w_data),
  34             self._phase.wrdata_mask.eq(0)
  35         ]
  36
  37         with m.If(self._command_issue.w_stb):
  38             m.d.comb += [
  39                 self._phase.cs.eq(Repl(value=self._command.w_data[0], count=len(self._phase.cs))),
  40                 self._phase.we.eq(self._command.w_data[1]),
  41                 self._phase.cas.eq(self._command.w_data[2]),
  42                 self._phase.ras.eq(self._command.w_data[3]),
  43             ]
  44         with m.Else():
  45             m.d.comb += [
  46                 self._phase.cs.eq(Repl(value=0, count=len(self._phase.cs))),
  47                 self._phase.we.eq(0),
  48                 self._phase.cas.eq(0),
  49                 self._phase.ras.eq(0),
  50             ]
  51
  52         with m.If(self._phase.rddata_valid):
  53             m.d.sync += self._rddata.r_data.eq(self._phase.rddata)
  54
  55         return m
  56
  57 # DFIInjector --------------------------------------------------------------------------------------
  58
  59
  60 class DFIInjector(Elaboratable):
  61     def __init__(self, csr_bank, addressbits, bankbits, nranks, databits, nphases=1):
  62         self._nranks = nranks
  63
  64         self._inti = dfi.Interface(addressbits, bankbits,
  65                                    nranks, databits, nphases,
  66                                    name="inti")
  67         self.slave = dfi.Interface(addressbits, bankbits,
  68                                    nranks, databits, nphases,
  69                                    name="slave")
  70         self.master = dfi.Interface(addressbits, bankbits,
  71                                     nranks, databits, nphases,
  72                                    name="master")
  73
  74         self._control = csr_bank.csr(4, "w")  # sel, clk_en, odt, reset
  75
  76         self._phases = []
  77         for n, phase in enumerate(self._inti.phases):
  78             self._phases += [PhaseInjector(CSRPrefixProxy(csr_bank,
  79                                                           "p{}".format(n)), phase)]
  80
  81     def elaborate(self, platform):
  82         m = Module()
  83
  84         for n, phase in enumerate(self._phases):
  85             m.submodules['phase_%d' % n] = phase
  86
  87         with m.If(self._control.w_data[0]):
  88             m.d.comb += self.slave.connect(self.master)
  89         with m.Else():
  90             m.d.comb += self._inti.connect(self.master)
  91
  92         for i in range(self._nranks):
  93             m.d.comb += [phase.clk_en[i].eq(self._control.w_data[1])
  94                          for phase in self._inti.phases]
  95             m.d.comb += [phase.odt[i].eq(self._control.w_data[2])
  96                          for phase in self._inti.phases if hasattr(phase, "odt")]
  97         m.d.comb += [phase.reset.eq(self._control.w_data[3])
  98                      for phase in self._inti.phases if hasattr(phase, "reset")]
  99
 100         return m