gram/simulation/icarusecpix5platform.py

   1 import os
   2 import subprocess
   3
   4 from nmigen.build import *
   5 from nmigen.vendor.lattice_ecp5 import *
   6 from nmigen_boards.resources import *
   7
   8
   9 __all__ = ["IcarusECPIX5Platform"]
  10
  11
  12 class IcarusECPIX5Platform(LatticeECP5Platform):
  13     device = "LFE5UM5G-85F"
  14     package = "BG554"
  15     speed = "8"
  16     default_clk = "clk100"
  17     default_rst = "rst"
  18
  19     resources = [
  20         Resource("rst", 0, PinsN("AB1", dir="i"), Attrs(IO_TYPE="LVCMOS33")),
  21         Resource("clk100", 0, Pins("K23", dir="i"),
  22                  Clock(100e6), Attrs(IO_TYPE="LVCMOS33")),
  23
  24         UARTResource(0,
  25                      rx="R26", tx="R24",
  26                      attrs=Attrs(IO_TYPE="LVCMOS33", PULLMODE="UP")
  27                      ),
  28
  29         Resource("ddr3", 0,
  30                  Subsignal("rst", Pins("fake", dir="o")), # for sim
  31                  #Subsignal("clk", Pins("H3", dir="o")),
  32                  Subsignal("clk", DiffPairs("H3", "J3", dir="o"), Attrs(IO_TYPE="SSTL135D_I")),
  33                  Subsignal("clk_en", Pins("P1", dir="o")),
  34                  Subsignal("we", PinsN("R3", dir="o")),
  35                  Subsignal("cs", PinsN("fake2", dir="o")), # for sim
  36                  Subsignal("ras", PinsN("T3", dir="o")),
  37                  Subsignal("cas", PinsN("P2", dir="o")),
  38                  #Subsignal("a", Pins("T5 M3 L3 V6 K2 W6 K3 L1 H2 L2 N1 J1 M1 K1", dir="o")),
  39                  Subsignal("a", Pins("T5 M3 L3 V6 K2 W6 K3 L1 H2 L2 N1 J1 M1", dir="o")),
  40                  Subsignal("ba", Pins("U6 N3 N4", dir="o")),
  41                  Subsignal("dqs", DiffPairs("V4 V1", "U5 U2", dir="io"), Attrs(IO_TYPE="SSTL135D_I")),
  42                  Subsignal("dq", Pins("T4 W4 R4 W5 R6 P6 P5 P4 R1 W3 T2 V3 U3 W1 T1 W2", dir="io")),
  43                  Subsignal("dm", Pins("U4 U1", dir="o")),
  44                  Subsignal("odt", Pins("P3", dir="o")),
  45                  Attrs(IO_TYPE="SSTL135_I")
  46                  ),
  47     ]
  48
  49     connectors = [
  50         Connector("pmod", 0, "T25 U25 U24 V24 - - T26 U26 V26 W26 - -"),
  51         Connector("pmod", 1, "U23 V23 U22 V21 - - W25 W24 W23 W22 - -"),
  52         Connector("pmod", 2, "J24 H22 E21 D18 - - K22 J21 H21 D22 - -"),
  53         Connector("pmod", 3, " E4  F4  E6  H4 - -  F3  D4  D5  F5 - -"),
  54         Connector("pmod", 4, "E26 D25 F26 F25 - - A25 A24 C26 C25 - -"),
  55         Connector("pmod", 5, "D19 C21 B21 C22 - - D21 A21 A22 A23 - -"),
  56         Connector("pmod", 6, "C16 B17 C18 B19 - - A17 A18 A19 C19 - -"),
  57         Connector("pmod", 7, "D14 B14 E14 B16 - - C14 A14 A15 A16 - -"),
  58     ]
  59
  60     @property
  61     def required_tools(self):
  62         return ["yosys"]
  63
  64     @property
  65     def file_templates(self):
  66         return {
  67             **TemplatedPlatform.build_script_templates,
  68             "{{name}}.il": r"""
  69             # {{autogenerated}}
  70             {{emit_rtlil()}}
  71             """,
  72         }
  73
  74     @property
  75     def command_templates(self):
  76         return []