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[binutils-gdb.git] / include / elf / mips.h
1 /* MIPS ELF support for BFD.
2 Copyright (C) 1993-2023 Free Software Foundation, Inc.
3
4 By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
5 information in the System V Application Binary Interface, MIPS
6 Processor Supplement.
7
8 This file is part of BFD, the Binary File Descriptor library.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
23 MA 02110-1301, USA. */
24
25 /* This file holds definitions specific to the MIPS ELF ABI. Note
26 that most of this is not actually implemented by BFD. */
27
28 #ifndef _ELF_MIPS_H
29 #define _ELF_MIPS_H
30
31 #include "elf/reloc-macros.h"
32
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36
37 /* Relocation types. */
38 START_RELOC_NUMBERS (elf_mips_reloc_type)
39 RELOC_NUMBER (R_MIPS_NONE, 0)
40 RELOC_NUMBER (R_MIPS_16, 1)
41 RELOC_NUMBER (R_MIPS_32, 2) /* In Elf 64: alias R_MIPS_ADD */
42 RELOC_NUMBER (R_MIPS_REL32, 3) /* In Elf 64: alias R_MIPS_REL */
43 RELOC_NUMBER (R_MIPS_26, 4)
44 RELOC_NUMBER (R_MIPS_HI16, 5)
45 RELOC_NUMBER (R_MIPS_LO16, 6)
46 RELOC_NUMBER (R_MIPS_GPREL16, 7) /* In Elf 64: alias R_MIPS_GPREL */
47 RELOC_NUMBER (R_MIPS_LITERAL, 8)
48 RELOC_NUMBER (R_MIPS_GOT16, 9) /* In Elf 64: alias R_MIPS_GOT */
49 RELOC_NUMBER (R_MIPS_PC16, 10)
50 RELOC_NUMBER (R_MIPS_CALL16, 11) /* In Elf 64: alias R_MIPS_CALL */
51 RELOC_NUMBER (R_MIPS_GPREL32, 12)
52 /* The remaining relocs are defined on Irix, although they are not
53 in the MIPS ELF ABI. */
54 RELOC_NUMBER (R_MIPS_UNUSED1, 13)
55 RELOC_NUMBER (R_MIPS_UNUSED2, 14)
56 RELOC_NUMBER (R_MIPS_UNUSED3, 15)
57 RELOC_NUMBER (R_MIPS_SHIFT5, 16)
58 RELOC_NUMBER (R_MIPS_SHIFT6, 17)
59 RELOC_NUMBER (R_MIPS_64, 18)
60 RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
61 RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
62 RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
63 RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
64 RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
65 RELOC_NUMBER (R_MIPS_SUB, 24)
66 RELOC_NUMBER (R_MIPS_INSERT_A, 25)
67 RELOC_NUMBER (R_MIPS_INSERT_B, 26)
68 RELOC_NUMBER (R_MIPS_DELETE, 27)
69 RELOC_NUMBER (R_MIPS_HIGHER, 28)
70 RELOC_NUMBER (R_MIPS_HIGHEST, 29)
71 RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
72 RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
73 RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
74 RELOC_NUMBER (R_MIPS_REL16, 33)
75 RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
76 RELOC_NUMBER (R_MIPS_PJUMP, 35)
77 RELOC_NUMBER (R_MIPS_RELGOT, 36)
78 RELOC_NUMBER (R_MIPS_JALR, 37)
79 /* TLS relocations. */
80 RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
81 RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
82 RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
83 RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
84 RELOC_NUMBER (R_MIPS_TLS_GD, 42)
85 RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
86 RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
87 RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
88 RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
89 RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
90 RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
91 RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
92 RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
93 RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
94 /* Space to grow */
95 RELOC_NUMBER (R_MIPS_PC21_S2, 60)
96 RELOC_NUMBER (R_MIPS_PC26_S2, 61)
97 RELOC_NUMBER (R_MIPS_PC18_S3, 62)
98 RELOC_NUMBER (R_MIPS_PC19_S2, 63)
99 RELOC_NUMBER (R_MIPS_PCHI16, 64)
100 RELOC_NUMBER (R_MIPS_PCLO16, 65)
101 FAKE_RELOC (R_MIPS_max, 66)
102 /* These relocs are used for the mips16. */
103 FAKE_RELOC (R_MIPS16_min, 100)
104 RELOC_NUMBER (R_MIPS16_26, 100)
105 RELOC_NUMBER (R_MIPS16_GPREL, 101)
106 RELOC_NUMBER (R_MIPS16_GOT16, 102)
107 RELOC_NUMBER (R_MIPS16_CALL16, 103)
108 RELOC_NUMBER (R_MIPS16_HI16, 104)
109 RELOC_NUMBER (R_MIPS16_LO16, 105)
110 RELOC_NUMBER (R_MIPS16_TLS_GD, 106)
111 RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)
112 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)
113 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)
114 RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)
115 RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)
116 RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)
117 RELOC_NUMBER (R_MIPS16_PC16_S1, 113)
118 FAKE_RELOC (R_MIPS16_max, 114)
119 /* These relocations are specific to VxWorks. */
120 RELOC_NUMBER (R_MIPS_COPY, 126)
121 RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
122
123 /* These relocations are specific to microMIPS. */
124 FAKE_RELOC (R_MICROMIPS_min, 130)
125 RELOC_NUMBER (R_MICROMIPS_26_S1, 133)
126 RELOC_NUMBER (R_MICROMIPS_HI16, 134)
127 RELOC_NUMBER (R_MICROMIPS_LO16, 135)
128 RELOC_NUMBER (R_MICROMIPS_GPREL16, 136) /* In Elf 64:
129 alias R_MICROMIPS_GPREL */
130 RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)
131 RELOC_NUMBER (R_MICROMIPS_GOT16, 138) /* In Elf 64:
132 alias R_MICROMIPS_GOT */
133 RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)
134 RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)
135 RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)
136 RELOC_NUMBER (R_MICROMIPS_CALL16, 142) /* In Elf 64:
137 alias R_MICROMIPS_CALL */
138 RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)
139 RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)
140 RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)
141 RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)
142 RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)
143 RELOC_NUMBER (R_MICROMIPS_SUB, 150)
144 RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)
145 RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)
146 RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)
147 RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)
148 RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)
149 RELOC_NUMBER (R_MICROMIPS_JALR, 156)
150 RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)
151 /* TLS relocations. */
152 RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)
153 RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)
154 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)
155 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)
156 RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)
157 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)
158 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)
159 /* microMIPS GP- and PC-relative relocations. */
160 RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)
161 RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)
162 FAKE_RELOC (R_MICROMIPS_max, 174)
163
164 /* This was a GNU extension used by embedded-PIC. It was co-opted by
165 mips-linux for exception-handling data. GCC stopped using it in
166 May, 2004, then started using it again for compact unwind tables. */
167 RELOC_NUMBER (R_MIPS_PC32, 248)
168 RELOC_NUMBER (R_MIPS_EH, 249)
169 /* FIXME: this relocation is used internally by gas. */
170 RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
171 /* These are GNU extensions to enable C++ vtable garbage collection. */
172 RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
173 RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
174 END_RELOC_NUMBERS (R_MIPS_maxext)
175
176 /* Processor specific flags for the ELF header e_flags field. */
177
178 /* At least one .noreorder directive appears in the source. */
179 #define EF_MIPS_NOREORDER 0x00000001
180
181 /* File contains position independent code. */
182 #define EF_MIPS_PIC 0x00000002
183
184 /* Code in file uses the standard calling sequence for calling
185 position independent code. */
186 #define EF_MIPS_CPIC 0x00000004
187
188 /* ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a. */
189 #define EF_MIPS_XGOT 0x00000008
190
191 /* Code in file uses UCODE (obsolete) */
192 #define EF_MIPS_UCODE 0x00000010
193
194 /* Code in file uses new ABI (-n32 on Irix 6). */
195 #define EF_MIPS_ABI2 0x00000020
196
197 /* Process the .MIPS.options section first by ld */
198 #define EF_MIPS_OPTIONS_FIRST 0x00000080
199
200 /* Indicates code compiled for a 64-bit machine in 32-bit mode
201 (regs are 32-bits wide). */
202 #define EF_MIPS_32BITMODE 0x00000100
203
204 /* 32-bit machine but FP registers are 64 bit (-mfp64). */
205 #define EF_MIPS_FP64 0x00000200
206
207 /* Code in file uses the IEEE 754-2008 NaN encoding convention. */
208 #define EF_MIPS_NAN2008 0x00000400
209
210 /* Architectural Extensions used by this file */
211 #define EF_MIPS_ARCH_ASE 0x0f000000
212
213 /* Use MDMX multimedia extensions */
214 #define EF_MIPS_ARCH_ASE_MDMX 0x08000000
215
216 /* Use MIPS-16 ISA extensions */
217 #define EF_MIPS_ARCH_ASE_M16 0x04000000
218
219 /* Use MICROMIPS ISA extensions. */
220 #define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000
221
222 /* Four bit MIPS architecture field. */
223 #define EF_MIPS_ARCH 0xf0000000
224
225 /* -mips1 code. */
226 #define E_MIPS_ARCH_1 0x00000000
227
228 /* -mips2 code. */
229 #define E_MIPS_ARCH_2 0x10000000
230
231 /* -mips3 code. */
232 #define E_MIPS_ARCH_3 0x20000000
233
234 /* -mips4 code. */
235 #define E_MIPS_ARCH_4 0x30000000
236
237 /* -mips5 code. */
238 #define E_MIPS_ARCH_5 0x40000000
239
240 /* -mips32 code. */
241 #define E_MIPS_ARCH_32 0x50000000
242
243 /* -mips64 code. */
244 #define E_MIPS_ARCH_64 0x60000000
245
246 /* -mips32r2 code. */
247 #define E_MIPS_ARCH_32R2 0x70000000
248
249 /* -mips64r2 code. */
250 #define E_MIPS_ARCH_64R2 0x80000000
251
252 /* -mips32r6 code. */
253 #define E_MIPS_ARCH_32R6 0x90000000
254
255 /* -mips64r6 code. */
256 #define E_MIPS_ARCH_64R6 0xa0000000
257
258 /* The ABI of the file. Also see EF_MIPS_ABI2 above. */
259 #define EF_MIPS_ABI 0x0000F000
260
261 /* The original o32 abi. */
262 #define E_MIPS_ABI_O32 0x00001000
263
264 /* O32 extended to work on 64 bit architectures */
265 #define E_MIPS_ABI_O64 0x00002000
266
267 /* EABI in 32 bit mode */
268 #define E_MIPS_ABI_EABI32 0x00003000
269
270 /* EABI in 64 bit mode */
271 #define E_MIPS_ABI_EABI64 0x00004000
272
273
274 /* Machine variant if we know it. This field was invented at Cygnus,
275 but it is hoped that other vendors will adopt it. If some standard
276 is developed, this code should be changed to follow it. */
277
278 #define EF_MIPS_MACH 0x00FF0000
279
280 /* Cygnus is choosing values between 80 and 9F;
281 00 - 7F should be left for a future standard;
282 the rest are open. */
283
284 #define E_MIPS_MACH_3900 0x00810000
285 #define E_MIPS_MACH_4010 0x00820000
286 #define E_MIPS_MACH_4100 0x00830000
287 #define E_MIPS_MACH_ALLEGREX 0x00840000
288 #define E_MIPS_MACH_4650 0x00850000
289 #define E_MIPS_MACH_4120 0x00870000
290 #define E_MIPS_MACH_4111 0x00880000
291 #define E_MIPS_MACH_SB1 0x008a0000
292 #define E_MIPS_MACH_OCTEON 0x008b0000
293 #define E_MIPS_MACH_XLR 0x008c0000
294 #define E_MIPS_MACH_OCTEON2 0x008d0000
295 #define E_MIPS_MACH_OCTEON3 0x008e0000
296 #define E_MIPS_MACH_5400 0x00910000
297 #define E_MIPS_MACH_5900 0x00920000
298 #define E_MIPS_MACH_IAMR2 0x00930000
299 #define E_MIPS_MACH_5500 0x00980000
300 #define E_MIPS_MACH_9000 0x00990000
301 #define E_MIPS_MACH_LS2E 0x00A00000
302 #define E_MIPS_MACH_LS2F 0x00A10000
303 #define E_MIPS_MACH_GS464 0x00A20000
304 #define E_MIPS_MACH_GS464E 0x00A30000
305 #define E_MIPS_MACH_GS264E 0x00A40000
306 \f
307 /* Processor specific section indices. These sections do not actually
308 exist. Symbols with a st_shndx field corresponding to one of these
309 values have a special meaning. */
310
311 /* Defined and allocated common symbol. Value is virtual address. If
312 relocated, alignment must be preserved. */
313 #define SHN_MIPS_ACOMMON SHN_LORESERVE
314
315 /* Defined and allocated text symbol. Value is virtual address.
316 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
317 #define SHN_MIPS_TEXT (SHN_LORESERVE + 1)
318
319 /* Defined and allocated data symbol. Value is virtual address.
320 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */
321 #define SHN_MIPS_DATA (SHN_LORESERVE + 2)
322
323 /* Small common symbol. */
324 #define SHN_MIPS_SCOMMON (SHN_LORESERVE + 3)
325
326 /* Small undefined symbol. */
327 #define SHN_MIPS_SUNDEFINED (SHN_LORESERVE + 4)
328 \f
329 /* Processor specific section types. */
330
331 /* Section contains the set of dynamic shared objects used when
332 statically linking. */
333 #define SHT_MIPS_LIBLIST 0x70000000
334
335 /* I'm not sure what this is, but it's used on Irix 5. */
336 #define SHT_MIPS_MSYM 0x70000001
337
338 /* Section contains list of symbols whose definitions conflict with
339 symbols defined in shared objects. */
340 #define SHT_MIPS_CONFLICT 0x70000002
341
342 /* Section contains the global pointer table. */
343 #define SHT_MIPS_GPTAB 0x70000003
344
345 /* Section contains microcode information. The exact format is
346 unspecified. */
347 #define SHT_MIPS_UCODE 0x70000004
348
349 /* Section contains some sort of debugging information. The exact
350 format is unspecified. It's probably ECOFF symbols. */
351 #define SHT_MIPS_DEBUG 0x70000005
352
353 /* Section contains register usage information. */
354 #define SHT_MIPS_REGINFO 0x70000006
355
356 /* ??? */
357 #define SHT_MIPS_PACKAGE 0x70000007
358
359 /* ??? */
360 #define SHT_MIPS_PACKSYM 0x70000008
361
362 /* ??? */
363 #define SHT_MIPS_RELD 0x70000009
364
365 /* Section contains interface information. */
366 #define SHT_MIPS_IFACE 0x7000000b
367
368 /* Section contains description of contents of another section. */
369 #define SHT_MIPS_CONTENT 0x7000000c
370
371 /* Section contains miscellaneous options. */
372 #define SHT_MIPS_OPTIONS 0x7000000d
373
374 /* ??? */
375 #define SHT_MIPS_SHDR 0x70000010
376
377 /* ??? */
378 #define SHT_MIPS_FDESC 0x70000011
379
380 /* ??? */
381 #define SHT_MIPS_EXTSYM 0x70000012
382
383 /* ??? */
384 #define SHT_MIPS_DENSE 0x70000013
385
386 /* ??? */
387 #define SHT_MIPS_PDESC 0x70000014
388
389 /* ??? */
390 #define SHT_MIPS_LOCSYM 0x70000015
391
392 /* ??? */
393 #define SHT_MIPS_AUXSYM 0x70000016
394
395 /* ??? */
396 #define SHT_MIPS_OPTSYM 0x70000017
397
398 /* ??? */
399 #define SHT_MIPS_LOCSTR 0x70000018
400
401 /* ??? */
402 #define SHT_MIPS_LINE 0x70000019
403
404 /* ??? */
405 #define SHT_MIPS_RFDESC 0x7000001a
406
407 /* Delta C++: symbol table */
408 #define SHT_MIPS_DELTASYM 0x7000001b
409
410 /* Delta C++: instance table */
411 #define SHT_MIPS_DELTAINST 0x7000001c
412
413 /* Delta C++: class table */
414 #define SHT_MIPS_DELTACLASS 0x7000001d
415
416 /* DWARF debugging section. */
417 #define SHT_MIPS_DWARF 0x7000001e
418
419 /* Delta C++: declarations */
420 #define SHT_MIPS_DELTADECL 0x7000001f
421
422 /* List of libraries the binary depends on. Includes a time stamp, version
423 number. */
424 #define SHT_MIPS_SYMBOL_LIB 0x70000020
425
426 /* Events section. */
427 #define SHT_MIPS_EVENTS 0x70000021
428
429 /* ??? */
430 #define SHT_MIPS_TRANSLATE 0x70000022
431
432 /* Special pixie sections */
433 #define SHT_MIPS_PIXIE 0x70000023
434
435 /* Address translation table (for debug info) */
436 #define SHT_MIPS_XLATE 0x70000024
437
438 /* SGI internal address translation table (for debug info) */
439 #define SHT_MIPS_XLATE_DEBUG 0x70000025
440
441 /* Intermediate code */
442 #define SHT_MIPS_WHIRL 0x70000026
443
444 /* C++ exception handling region info */
445 #define SHT_MIPS_EH_REGION 0x70000027
446
447 /* Obsolete address translation table (for debug info) */
448 #define SHT_MIPS_XLATE_OLD 0x70000028
449
450 /* Runtime procedure descriptor table exception information (ucode) ??? */
451 #define SHT_MIPS_PDR_EXCEPTION 0x70000029
452
453 /* ABI related flags section. */
454 #define SHT_MIPS_ABIFLAGS 0x7000002a
455
456 /* GNU style symbol hash table with xlat. */
457 #define SHT_MIPS_XHASH 0x7000002b
458
459 /* A section of type SHT_MIPS_LIBLIST contains an array of the
460 following structure. The sh_link field is the section index of the
461 string table. The sh_info field is the number of entries in the
462 section. */
463 typedef struct
464 {
465 /* String table index for name of shared object. */
466 unsigned long l_name;
467 /* Time stamp. */
468 unsigned long l_time_stamp;
469 /* Checksum of symbol names and common sizes. */
470 unsigned long l_checksum;
471 /* String table index for version. */
472 unsigned long l_version;
473 /* Flags. */
474 unsigned long l_flags;
475 } Elf32_Lib;
476
477 /* The external version of Elf32_Lib. */
478 typedef struct
479 {
480 unsigned char l_name[4];
481 unsigned char l_time_stamp[4];
482 unsigned char l_checksum[4];
483 unsigned char l_version[4];
484 unsigned char l_flags[4];
485 } Elf32_External_Lib;
486
487 /* The l_flags field of an Elf32_Lib structure may contain the
488 following flags. */
489
490 /* Require an exact match at runtime. */
491 #define LL_EXACT_MATCH 0x00000001
492
493 /* Ignore version incompatibilities at runtime. */
494 #define LL_IGNORE_INT_VER 0x00000002
495
496 /* Require matching minor version number. */
497 #define LL_REQUIRE_MINOR 0x00000004
498
499 /* ??? */
500 #define LL_EXPORTS 0x00000008
501
502 /* Delay loading of this library until really needed. */
503 #define LL_DELAY_LOAD 0x00000010
504
505 /* ??? Delta C++ stuff ??? */
506 #define LL_DELTA 0x00000020
507
508
509 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the
510 .dynsym section. Each element has the following type. */
511 typedef unsigned long Elf32_Conflict;
512 typedef unsigned char Elf32_External_Conflict[4];
513
514 typedef unsigned long Elf64_Conflict;
515 typedef unsigned char Elf64_External_Conflict[8];
516
517 /* A section of type SHT_MIPS_GPTAB contains information about how
518 much GP space would be required for different -G arguments. This
519 information is only used so that the linker can provide informative
520 suggestions as to the best -G value to use. The sh_info field is
521 the index of the section for which this information applies. The
522 contents of the section are an array of the following union. The
523 first element uses the gt_header field. The remaining elements use
524 the gt_entry field. */
525 typedef union
526 {
527 struct
528 {
529 /* -G value actually used for this object file. */
530 unsigned long gt_current_g_value;
531 /* Unused. */
532 unsigned long gt_unused;
533 } gt_header;
534 struct
535 {
536 /* If this -G argument has been used... */
537 unsigned long gt_g_value;
538 /* ...this many GP section bytes would be required. */
539 unsigned long gt_bytes;
540 } gt_entry;
541 } Elf32_gptab;
542
543 /* The external version of Elf32_gptab. */
544
545 typedef union
546 {
547 struct
548 {
549 unsigned char gt_current_g_value[4];
550 unsigned char gt_unused[4];
551 } gt_header;
552 struct
553 {
554 unsigned char gt_g_value[4];
555 unsigned char gt_bytes[4];
556 } gt_entry;
557 } Elf32_External_gptab;
558
559 /* A section of type SHT_MIPS_REGINFO contains the following
560 structure. */
561 typedef struct
562 {
563 /* Mask of general purpose registers used. */
564 uint32_t ri_gprmask;
565 /* Mask of co-processor registers used. */
566 uint32_t ri_cprmask[4];
567 /* GP register value for this object file. */
568 uint32_t ri_gp_value;
569 } Elf32_RegInfo;
570
571 /* The external version of the Elf_RegInfo structure. */
572 typedef struct
573 {
574 unsigned char ri_gprmask[4];
575 unsigned char ri_cprmask[4][4];
576 unsigned char ri_gp_value[4];
577 } Elf32_External_RegInfo;
578
579 /* MIPS ELF .reginfo swapping routines. */
580 extern void bfd_mips_elf32_swap_reginfo_in
581 (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
582 extern void bfd_mips_elf32_swap_reginfo_out
583 (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
584 \f
585 /* Processor specific section flags. */
586
587 /* This section must be in the global data area. */
588 #define SHF_MIPS_GPREL 0x10000000
589
590 /* This section should be merged. */
591 #define SHF_MIPS_MERGE 0x20000000
592
593 /* This section contains address data of size implied by section
594 element size. */
595 #define SHF_MIPS_ADDR 0x40000000
596
597 /* This section contains string data. */
598 #define SHF_MIPS_STRING 0x80000000
599
600 /* This section may not be stripped. */
601 #define SHF_MIPS_NOSTRIP 0x08000000
602
603 /* This section is local to threads. */
604 #define SHF_MIPS_LOCAL 0x04000000
605
606 /* Linker should generate implicit weak names for this section. */
607 #define SHF_MIPS_NAMES 0x02000000
608
609 /* Section contais text/data which may be replicated in other sections.
610 Linker should retain only one copy. */
611 #define SHF_MIPS_NODUPES 0x01000000
612 \f
613 /* Processor specific program header types. */
614
615 /* Register usage information. Identifies one .reginfo section. */
616 #define PT_MIPS_REGINFO 0x70000000
617
618 /* Runtime procedure table. */
619 #define PT_MIPS_RTPROC 0x70000001
620
621 /* .MIPS.options section. */
622 #define PT_MIPS_OPTIONS 0x70000002
623
624 /* Records ABI related flags. */
625 #define PT_MIPS_ABIFLAGS 0x70000003
626 \f
627 /* Processor specific dynamic array tags. */
628
629 /* 32 bit version number for runtime linker interface. */
630 #define DT_MIPS_RLD_VERSION 0x70000001
631
632 /* Time stamp. */
633 #define DT_MIPS_TIME_STAMP 0x70000002
634
635 /* Checksum of external strings and common sizes. */
636 #define DT_MIPS_ICHECKSUM 0x70000003
637
638 /* Index of version string in string table. */
639 #define DT_MIPS_IVERSION 0x70000004
640
641 /* 32 bits of flags. */
642 #define DT_MIPS_FLAGS 0x70000005
643
644 /* Base address of the segment. */
645 #define DT_MIPS_BASE_ADDRESS 0x70000006
646
647 /* ??? */
648 #define DT_MIPS_MSYM 0x70000007
649
650 /* Address of .conflict section. */
651 #define DT_MIPS_CONFLICT 0x70000008
652
653 /* Address of .liblist section. */
654 #define DT_MIPS_LIBLIST 0x70000009
655
656 /* Number of local global offset table entries. */
657 #define DT_MIPS_LOCAL_GOTNO 0x7000000a
658
659 /* Number of entries in the .conflict section. */
660 #define DT_MIPS_CONFLICTNO 0x7000000b
661
662 /* Number of entries in the .liblist section. */
663 #define DT_MIPS_LIBLISTNO 0x70000010
664
665 /* Number of entries in the .dynsym section. */
666 #define DT_MIPS_SYMTABNO 0x70000011
667
668 /* Index of first external dynamic symbol not referenced locally. */
669 #define DT_MIPS_UNREFEXTNO 0x70000012
670
671 /* Index of first dynamic symbol in global offset table. */
672 #define DT_MIPS_GOTSYM 0x70000013
673
674 /* Number of page table entries in global offset table. */
675 #define DT_MIPS_HIPAGENO 0x70000014
676
677 /* Address of run time loader map, used for debugging. */
678 #define DT_MIPS_RLD_MAP 0x70000016
679
680 /* Delta C++ class definition. */
681 #define DT_MIPS_DELTA_CLASS 0x70000017
682
683 /* Number of entries in DT_MIPS_DELTA_CLASS. */
684 #define DT_MIPS_DELTA_CLASS_NO 0x70000018
685
686 /* Delta C++ class instances. */
687 #define DT_MIPS_DELTA_INSTANCE 0x70000019
688
689 /* Number of entries in DT_MIPS_DELTA_INSTANCE. */
690 #define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a
691
692 /* Delta relocations. */
693 #define DT_MIPS_DELTA_RELOC 0x7000001b
694
695 /* Number of entries in DT_MIPS_DELTA_RELOC. */
696 #define DT_MIPS_DELTA_RELOC_NO 0x7000001c
697
698 /* Delta symbols that Delta relocations refer to. */
699 #define DT_MIPS_DELTA_SYM 0x7000001d
700
701 /* Number of entries in DT_MIPS_DELTA_SYM. */
702 #define DT_MIPS_DELTA_SYM_NO 0x7000001e
703
704 /* Delta symbols that hold class declarations. */
705 #define DT_MIPS_DELTA_CLASSSYM 0x70000020
706
707 /* Number of entries in DT_MIPS_DELTA_CLASSSYM. */
708 #define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021
709
710 /* Flags indicating information about C++ flavor. */
711 #define DT_MIPS_CXX_FLAGS 0x70000022
712
713 /* Pixie information (???). */
714 #define DT_MIPS_PIXIE_INIT 0x70000023
715
716 /* Address of .MIPS.symlib */
717 #define DT_MIPS_SYMBOL_LIB 0x70000024
718
719 /* The GOT index of the first PTE for a segment */
720 #define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
721
722 /* The GOT index of the first PTE for a local symbol */
723 #define DT_MIPS_LOCAL_GOTIDX 0x70000026
724
725 /* The GOT index of the first PTE for a hidden symbol */
726 #define DT_MIPS_HIDDEN_GOTIDX 0x70000027
727
728 /* The GOT index of the first PTE for a protected symbol */
729 #define DT_MIPS_PROTECTED_GOTIDX 0x70000028
730
731 /* Address of `.MIPS.options'. */
732 #define DT_MIPS_OPTIONS 0x70000029
733
734 /* Address of `.interface'. */
735 #define DT_MIPS_INTERFACE 0x7000002a
736
737 /* ??? */
738 #define DT_MIPS_DYNSTR_ALIGN 0x7000002b
739
740 /* Size of the .interface section. */
741 #define DT_MIPS_INTERFACE_SIZE 0x7000002c
742
743 /* Size of rld_text_resolve function stored in the GOT. */
744 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d
745
746 /* Default suffix of DSO to be added by rld on dlopen() calls. */
747 #define DT_MIPS_PERF_SUFFIX 0x7000002e
748
749 /* Size of compact relocation section (O32). */
750 #define DT_MIPS_COMPACT_SIZE 0x7000002f
751
752 /* GP value for auxiliary GOTs. */
753 #define DT_MIPS_GP_VALUE 0x70000030
754
755 /* Address of auxiliary .dynamic. */
756 #define DT_MIPS_AUX_DYNAMIC 0x70000031
757
758 /* Address of the base of the PLTGOT. */
759 #define DT_MIPS_PLTGOT 0x70000032
760
761 /* Points to the base of a writable PLT. */
762 #define DT_MIPS_RWPLT 0x70000034
763
764 /* Relative offset of run time loader map, used for debugging. */
765 #define DT_MIPS_RLD_MAP_REL 0x70000035
766
767 /* Address of .MIPS.xhash section. */
768 #define DT_MIPS_XHASH 0x70000036
769 \f
770 /* Flags which may appear in a DT_MIPS_FLAGS entry. */
771
772 /* No flags. */
773 #define RHF_NONE 0x00000000
774
775 /* Uses shortcut pointers. */
776 #define RHF_QUICKSTART 0x00000001
777
778 /* Hash size is not a power of two. */
779 #define RHF_NOTPOT 0x00000002
780
781 /* Ignore LD_LIBRARY_PATH. */
782 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
783
784 /* DSO address may not be relocated. */
785 #define RHF_NO_MOVE 0x00000008
786
787 /* SGI specific features. */
788 #define RHF_SGI_ONLY 0x00000010
789
790 /* Guarantee that .init will finish executing before any non-init
791 code in DSO is called. */
792 #define RHF_GUARANTEE_INIT 0x00000020
793
794 /* Contains Delta C++ code. */
795 #define RHF_DELTA_C_PLUS_PLUS 0x00000040
796
797 /* Guarantee that .init will start executing before any non-init
798 code in DSO is called. */
799 #define RHF_GUARANTEE_START_INIT 0x00000080
800
801 /* Generated by pixie. */
802 #define RHF_PIXIE 0x00000100
803
804 /* Delay-load DSO by default. */
805 #define RHF_DEFAULT_DELAY_LOAD 0x00000200
806
807 /* Object may be requickstarted */
808 #define RHF_REQUICKSTART 0x00000400
809
810 /* Object has been requickstarted */
811 #define RHF_REQUICKSTARTED 0x00000800
812
813 /* Generated by cord. */
814 #define RHF_CORD 0x00001000
815
816 /* Object contains no unresolved undef symbols. */
817 #define RHF_NO_UNRES_UNDEF 0x00002000
818
819 /* Symbol table is in a safe order. */
820 #define RHF_RLD_ORDER_SAFE 0x00004000
821 \f
822 /* Special values for the st_other field in the symbol table. These
823 are used in an Irix 5 dynamic symbol table. */
824
825 #define STO_DEFAULT STV_DEFAULT
826 #define STO_INTERNAL STV_INTERNAL
827 #define STO_HIDDEN STV_HIDDEN
828 #define STO_PROTECTED STV_PROTECTED
829
830 /* Two topmost bits denote the MIPS ISA for .text symbols:
831 + 00 -- standard MIPS code,
832 + 10 -- microMIPS code,
833 + 11 -- MIPS16 code; requires the following two bits to be set too.
834 Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC. See below
835 for details. */
836 #define STO_MIPS_ISA (3 << 6)
837
838 /* The mask spanning the rest of MIPS psABI flags. At most one is expected
839 to be set except for STO_MIPS16. */
840 #define STO_MIPS_FLAGS (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
841
842 /* The MIPS psABI was updated in 2008 with support for PLTs and copy
843 relocs. There are therefore two types of nonzero SHN_UNDEF functions:
844 PLT entries and traditional MIPS lazy binding stubs. We mark the former
845 with STO_MIPS_PLT to distinguish them from the latter. */
846 #define STO_MIPS_PLT 0x8
847 #define ELF_ST_IS_MIPS_PLT(other) \
848 ((ELF_ST_IS_MIPS16 (other) \
849 ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS)) \
850 : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
851 #define ELF_ST_SET_MIPS_PLT(other) \
852 ((ELF_ST_IS_MIPS16 (other) \
853 ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS)) \
854 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
855
856 /* This value is used to mark PIC functions in an object that mixes
857 PIC and non-PIC. Note that this bit overlaps with STO_MIPS16,
858 although MIPS16 symbols are never considered to be MIPS_PIC. */
859 #define STO_MIPS_PIC 0x20
860 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
861 #define ELF_ST_SET_MIPS_PIC(other) \
862 ((ELF_ST_IS_MIPS16 (other) \
863 ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS)) \
864 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
865
866 /* This value is used for a mips16 .text symbol. */
867 #define STO_MIPS16 0xf0
868 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
869 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
870
871 /* This value is used for a microMIPS .text symbol. To distinguish from
872 STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The
873 mask is STO_MIPS_ISA. */
874 #define STO_MICROMIPS (2 << 6)
875 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
876 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
877
878 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
879 has been indicated for a .text symbol. */
880 #define ELF_ST_IS_COMPRESSED(other) \
881 (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
882
883 /* This bit is used on Irix to indicate a symbol whose definition
884 is optional - if, at final link time, it cannot be found, no
885 error message should be produced. */
886 #define STO_OPTIONAL (1 << 2)
887 /* A macro to examine the STO_OPTIONAL bit. */
888 #define ELF_MIPS_IS_OPTIONAL(other) ((other) & STO_OPTIONAL)
889 \f
890 /* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each
891 relocation entry specifies up to three actual relocations, all at
892 the same address. The first relocation which required a symbol
893 uses the symbol in the r_sym field. The second relocation which
894 requires a symbol uses the symbol in the r_ssym field. If all
895 three relocations require a symbol, the third one uses a zero
896 value. */
897
898 /* An entry in a 64 bit SHT_REL section. */
899
900 typedef struct
901 {
902 /* Address of relocation. */
903 unsigned char r_offset[8];
904 /* Symbol index. */
905 unsigned char r_sym[4];
906 /* Special symbol. */
907 unsigned char r_ssym[1];
908 /* Third relocation. */
909 unsigned char r_type3[1];
910 /* Second relocation. */
911 unsigned char r_type2[1];
912 /* First relocation. */
913 unsigned char r_type[1];
914 } Elf64_Mips_External_Rel;
915
916 typedef struct
917 {
918 /* Address of relocation. */
919 bfd_vma r_offset;
920 /* Symbol index. */
921 unsigned long r_sym;
922 /* Special symbol. */
923 unsigned char r_ssym;
924 /* Third relocation. */
925 unsigned char r_type3;
926 /* Second relocation. */
927 unsigned char r_type2;
928 /* First relocation. */
929 unsigned char r_type;
930 } Elf64_Mips_Internal_Rel;
931
932 /* An entry in a 64 bit SHT_RELA section. */
933
934 typedef struct
935 {
936 /* Address of relocation. */
937 unsigned char r_offset[8];
938 /* Symbol index. */
939 unsigned char r_sym[4];
940 /* Special symbol. */
941 unsigned char r_ssym[1];
942 /* Third relocation. */
943 unsigned char r_type3[1];
944 /* Second relocation. */
945 unsigned char r_type2[1];
946 /* First relocation. */
947 unsigned char r_type[1];
948 /* Addend. */
949 unsigned char r_addend[8];
950 } Elf64_Mips_External_Rela;
951
952 typedef struct
953 {
954 /* Address of relocation. */
955 bfd_vma r_offset;
956 /* Symbol index. */
957 unsigned long r_sym;
958 /* Special symbol. */
959 unsigned char r_ssym;
960 /* Third relocation. */
961 unsigned char r_type3;
962 /* Second relocation. */
963 unsigned char r_type2;
964 /* First relocation. */
965 unsigned char r_type;
966 /* Addend. */
967 bfd_signed_vma r_addend;
968 } Elf64_Mips_Internal_Rela;
969
970 /* MIPS ELF 64 relocation info access macros. */
971 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
972 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
973 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
974 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
975
976 /* Values found in the r_ssym field of a relocation entry. */
977
978 /* No relocation. */
979 #define RSS_UNDEF 0
980
981 /* Value of GP. */
982 #define RSS_GP 1
983
984 /* Value of GP in object being relocated. */
985 #define RSS_GP0 2
986
987 /* Address of location being relocated. */
988 #define RSS_LOC 3
989 \f
990 /* A SHT_MIPS_OPTIONS section contains a series of options, each of
991 which starts with this header. */
992
993 typedef struct
994 {
995 /* Type of option. */
996 unsigned char kind[1];
997 /* Size of option descriptor, including header. */
998 unsigned char size[1];
999 /* Section index of affected section, or 0 for global option. */
1000 unsigned char section[2];
1001 /* Information specific to this kind of option. */
1002 unsigned char info[4];
1003 } Elf_External_Options;
1004
1005 typedef struct
1006 {
1007 /* Type of option. */
1008 unsigned char kind;
1009 /* Size of option descriptor, including header. */
1010 unsigned char size;
1011 /* Section index of affected section, or 0 for global option. */
1012 uint16_t section;
1013 /* Information specific to this kind of option. */
1014 uint32_t info;
1015 } Elf_Internal_Options;
1016
1017 /* MIPS ELF option header swapping routines. */
1018 extern void bfd_mips_elf_swap_options_in
1019 (bfd *, const Elf_External_Options *, Elf_Internal_Options *);
1020 extern void bfd_mips_elf_swap_options_out
1021 (bfd *, const Elf_Internal_Options *, Elf_External_Options *);
1022
1023 /* Values which may appear in the kind field of an Elf_Options
1024 structure. */
1025
1026 /* Undefined. */
1027 #define ODK_NULL 0
1028
1029 /* Register usage and GP value. */
1030 #define ODK_REGINFO 1
1031
1032 /* Exception processing information. */
1033 #define ODK_EXCEPTIONS 2
1034
1035 /* Section padding information. */
1036 #define ODK_PAD 3
1037
1038 /* Hardware workarounds performed. */
1039 #define ODK_HWPATCH 4
1040
1041 /* Fill value used by the linker. */
1042 #define ODK_FILL 5
1043
1044 /* Reserved space for desktop tools. */
1045 #define ODK_TAGS 6
1046
1047 /* Hardware workarounds, AND bits when merging. */
1048 #define ODK_HWAND 7
1049
1050 /* Hardware workarounds, OR bits when merging. */
1051 #define ODK_HWOR 8
1052
1053 /* GP group to use for text/data sections. */
1054 #define ODK_GP_GROUP 9
1055
1056 /* ID information. */
1057 #define ODK_IDENT 10
1058
1059 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
1060 structure. In the 64 bit ABI, it is the following structure. The
1061 info field of the options header is not used. */
1062
1063 typedef struct
1064 {
1065 /* Mask of general purpose registers used. */
1066 unsigned char ri_gprmask[4];
1067 /* Padding. */
1068 unsigned char ri_pad[4];
1069 /* Mask of co-processor registers used. */
1070 unsigned char ri_cprmask[4][4];
1071 /* GP register value for this object file. */
1072 unsigned char ri_gp_value[8];
1073 } Elf64_External_RegInfo;
1074
1075 typedef struct
1076 {
1077 /* Mask of general purpose registers used. */
1078 uint32_t ri_gprmask;
1079 /* Padding. */
1080 uint32_t ri_pad;
1081 /* Mask of co-processor registers used. */
1082 uint32_t ri_cprmask[4];
1083 /* GP register value for this object file. */
1084 uint64_t ri_gp_value;
1085 } Elf64_Internal_RegInfo;
1086
1087 /* ABI Flags structure version 0. */
1088
1089 typedef struct
1090 {
1091 /* Version of flags structure. */
1092 unsigned char version[2];
1093 /* The level of the ISA: 1-5, 32, 64. */
1094 unsigned char isa_level[1];
1095 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */
1096 unsigned char isa_rev[1];
1097 /* The size of general purpose registers. */
1098 unsigned char gpr_size[1];
1099 /* The size of co-processor 1 registers. */
1100 unsigned char cpr1_size[1];
1101 /* The size of co-processor 2 registers. */
1102 unsigned char cpr2_size[1];
1103 /* The floating-point ABI. */
1104 unsigned char fp_abi[1];
1105 /* Processor-specific extension. */
1106 unsigned char isa_ext[4];
1107 /* Mask of ASEs used. */
1108 unsigned char ases[4];
1109 /* Mask of general flags. */
1110 unsigned char flags1[4];
1111 unsigned char flags2[4];
1112 } Elf_External_ABIFlags_v0;
1113
1114 typedef struct elf_internal_abiflags_v0
1115 {
1116 /* Version of flags structure. */
1117 unsigned short version;
1118 /* The level of the ISA: 1-5, 32, 64. */
1119 unsigned char isa_level;
1120 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */
1121 unsigned char isa_rev;
1122 /* The size of general purpose registers. */
1123 unsigned char gpr_size;
1124 /* The size of co-processor 1 registers. */
1125 unsigned char cpr1_size;
1126 /* The size of co-processor 2 registers. */
1127 unsigned char cpr2_size;
1128 /* The floating-point ABI. */
1129 unsigned char fp_abi;
1130 /* Processor-specific extension. */
1131 unsigned long isa_ext;
1132 /* Mask of ASEs used. */
1133 unsigned long ases;
1134 /* Mask of general flags. */
1135 unsigned long flags1;
1136 unsigned long flags2;
1137 } Elf_Internal_ABIFlags_v0;
1138
1139 typedef struct
1140 {
1141 /* The hash value computed from the name of the corresponding
1142 dynamic symbol. */
1143 unsigned char ms_hash_value[4];
1144 /* Contains both the dynamic relocation index and the symbol flags
1145 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1146 to access the individual values. The dynamic relocation index
1147 identifies the first entry in the .rel.dyn section that
1148 references the dynamic symbol corresponding to this msym entry.
1149 If the index is 0, no dynamic relocations are associated with the
1150 symbol. The symbol flags field is reserved for future use. */
1151 unsigned char ms_info[4];
1152 } Elf32_External_Msym;
1153
1154 typedef struct
1155 {
1156 /* The hash value computed from the name of the corresponding
1157 dynamic symbol. */
1158 unsigned long ms_hash_value;
1159 /* Contains both the dynamic relocation index and the symbol flags
1160 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1161 to access the individual values. The dynamic relocation index
1162 identifies the first entry in the .rel.dyn section that
1163 references the dynamic symbol corresponding to this msym entry.
1164 If the index is 0, no dynamic relocations are associated with the
1165 symbol. The symbol flags field is reserved for future use. */
1166 unsigned long ms_info;
1167 } Elf32_Internal_Msym;
1168
1169 #define ELF32_MS_REL_INDEX(i) ((i) >> 8)
1170 #define ELF32_MS_FLAGS(i) (i) & 0xff)
1171 #define ELF32_MS_INFO(r, f) (((r) << 8) + ((f) & 0xff))
1172
1173 /* MIPS ELF reginfo swapping routines. */
1174 extern void bfd_mips_elf64_swap_reginfo_in
1175 (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
1176 extern void bfd_mips_elf64_swap_reginfo_out
1177 (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
1178
1179 /* MIPS ELF flags swapping routines. */
1180 extern void bfd_mips_elf_swap_abiflags_v0_in
1181 (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *);
1182 extern void bfd_mips_elf_swap_abiflags_v0_out
1183 (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *);
1184
1185 /* Masks for the info work of an ODK_EXCEPTIONS descriptor. */
1186 #define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */
1187 #define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */
1188 #define OEX_PAGE0 0x10000 /* Page zero must be mapped. */
1189 #define OEX_SMM 0x20000 /* Force sequential memory mode. */
1190 #define OEX_FPDBUG 0x40000 /* Force precise floating-point
1191 exceptions (debug mode). */
1192 #define OEX_DISMISS 0x80000 /* Dismiss invalid address faults. */
1193
1194 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX. */
1195 #define OEX_FPU_INVAL 0x10 /* Invalid operation exception. */
1196 #define OEX_FPU_DIV0 0x08 /* Division by zero exception. */
1197 #define OEX_FPU_OFLO 0x04 /* Overflow exception. */
1198 #define OEX_FPU_UFLO 0x02 /* Underflow exception. */
1199 #define OEX_FPU_INEX 0x01 /* Inexact exception. */
1200
1201 /* Masks for the info word of an ODK_PAD descriptor. */
1202 #define OPAD_PREFIX 0x01
1203 #define OPAD_POSTFIX 0x02
1204 #define OPAD_SYMBOL 0x04
1205
1206 /* Masks for the info word of an ODK_HWPATCH descriptor. */
1207 #define OHW_R4KEOP 0x00000001 /* R4000 end-of-page patch. */
1208 #define OHW_R8KPFETCH 0x00000002 /* May need R8000 prefetch patch. */
1209 #define OHW_R5KEOP 0x00000004 /* R5000 end-of-page patch. */
1210 #define OHW_R5KCVTL 0x00000008 /* R5000 cvt.[ds].l bug
1211 (clean == 1). */
1212 #define OHW_R10KLDL 0x00000010 /* Needs R10K misaligned
1213 load patch. */
1214
1215 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor. */
1216 #define OGP_GROUP 0x0000ffff /* GP group number. */
1217 #define OGP_SELF 0xffff0000 /* Self-contained GP groups. */
1218
1219 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor. */
1220 #define OHWA0_R4KEOP_CHECKED 0x00000001
1221 #define OHWA0_R4KEOP_CLEAN 0x00000002
1222
1223 /* Values for the xxx_size bytes of an ABI flags structure. */
1224
1225 #define AFL_REG_NONE 0x00 /* No registers. */
1226 #define AFL_REG_32 0x01 /* 32-bit registers. */
1227 #define AFL_REG_64 0x02 /* 64-bit registers. */
1228 #define AFL_REG_128 0x03 /* 128-bit registers. */
1229
1230 /* Masks for the ases word of an ABI flags structure. */
1231
1232 #define AFL_ASE_DSP 0x00000001 /* DSP ASE. */
1233 #define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */
1234 #define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */
1235 #define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */
1236 #define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */
1237 #define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */
1238 #define AFL_ASE_MT 0x00000040 /* MT ASE. */
1239 #define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */
1240 #define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */
1241 #define AFL_ASE_MSA 0x00000200 /* MSA ASE. */
1242 #define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */
1243 #define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */
1244 #define AFL_ASE_XPA 0x00001000 /* XPA ASE. */
1245 #define AFL_ASE_DSPR3 0x00002000 /* DSP R3 ASE. */
1246 #define AFL_ASE_MIPS16E2 0x00004000 /* MIPS16e2 ASE. */
1247 #define AFL_ASE_CRC 0x00008000 /* CRC ASE. */
1248 #define AFL_ASE_RESERVED1 0x00010000 /* Reserved by MIPS Tech for WIP. */
1249 #define AFL_ASE_GINV 0x00020000 /* GINV ASE. */
1250 #define AFL_ASE_LOONGSON_MMI 0x00040000 /* Loongson MMI ASE. */
1251 #define AFL_ASE_LOONGSON_CAM 0x00080000 /* Loongson CAM ASE. */
1252 #define AFL_ASE_LOONGSON_EXT 0x00100000 /* Loongson EXT instructions. */
1253 #define AFL_ASE_LOONGSON_EXT2 0x00200000 /* Loongson EXT2 instructions. */
1254 #define AFL_ASE_MASK 0x003effff /* All ASEs. */
1255
1256 /* Values for the isa_ext word of an ABI flags structure. */
1257
1258 #define AFL_EXT_XLR 1 /* RMI Xlr instruction. */
1259 #define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */
1260 #define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */
1261 #define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */
1262 #define AFL_EXT_5900 6 /* MIPS R5900 instruction. */
1263 #define AFL_EXT_4650 7 /* MIPS R4650 instruction. */
1264 #define AFL_EXT_4010 8 /* LSI R4010 instruction. */
1265 #define AFL_EXT_4100 9 /* NEC VR4100 instruction. */
1266 #define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */
1267 #define AFL_EXT_10000 11 /* MIPS R10000 instruction. */
1268 #define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */
1269 #define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */
1270 #define AFL_EXT_4120 14 /* NEC VR4120 instruction. */
1271 #define AFL_EXT_5400 15 /* NEC VR5400 instruction. */
1272 #define AFL_EXT_5500 16 /* NEC VR5500 instruction. */
1273 #define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */
1274 #define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */
1275 #define AFL_EXT_OCTEON3 19 /* Cavium Networks Octeon3. */
1276 #define AFL_EXT_INTERAPTIV_MR2 20 /* Imagination interAptiv MR2. */
1277
1278 /* Masks for the flags1 word of an ABI flags structure. */
1279 #define AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */
1280
1281 extern unsigned int bfd_mips_isa_ext (bfd *);
1282 \f
1283
1284 /* Object attribute tags. */
1285 enum
1286 {
1287 /* 0-3 are generic. */
1288
1289 /* Floating-point ABI used by this object file. */
1290 Tag_GNU_MIPS_ABI_FP = 4,
1291
1292 /* MSA ABI used by this object file. */
1293 Tag_GNU_MIPS_ABI_MSA = 8,
1294 };
1295
1296 /* Object attribute values. */
1297 enum
1298 {
1299 /* Values defined for Tag_GNU_MIPS_ABI_FP. */
1300
1301 /* Not tagged or not using any ABIs affected by the differences. */
1302 Val_GNU_MIPS_ABI_FP_ANY = 0,
1303
1304 /* Using hard-float -mdouble-float. */
1305 Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
1306
1307 /* Using hard-float -msingle-float. */
1308 Val_GNU_MIPS_ABI_FP_SINGLE = 2,
1309
1310 /* Using soft-float. */
1311 Val_GNU_MIPS_ABI_FP_SOFT = 3,
1312
1313 /* Using -mips32r2 -mfp64. */
1314 Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
1315
1316 /* Using -mfpxx */
1317 Val_GNU_MIPS_ABI_FP_XX = 5,
1318
1319 /* Using -mips32r2 -mfp64. */
1320 Val_GNU_MIPS_ABI_FP_64 = 6,
1321
1322 /* Using -mips32r2 -mfp64 -mno-odd-spreg. */
1323 Val_GNU_MIPS_ABI_FP_64A = 7,
1324
1325 /* This is reserved for backward-compatibility with an earlier
1326 implementation of the MIPS NaN2008 functionality. */
1327 Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
1328
1329 /* Values defined for Tag_GNU_MIPS_ABI_MSA. */
1330
1331 /* Not tagged or not using any ABIs affected by the differences. */
1332 Val_GNU_MIPS_ABI_MSA_ANY = 0,
1333
1334 /* Using 128-bit MSA. */
1335 Val_GNU_MIPS_ABI_MSA_128 = 1,
1336 };
1337
1338 #ifdef __cplusplus
1339 }
1340 #endif
1341
1342 #endif /* _ELF_MIPS_H */