0f50118d4009141e2b6c7b920a38e77d9b7ba941
1 #ifndef __TEST_MACROS_SCALAR_H
2 #define __TEST_MACROS_SCALAR_H
5 #-----------------------------------------------------------------------
7 #-----------------------------------------------------------------------
9 #define TEST_CASE( testnum, testreg, correctval, code... ) \
13 li TESTNUM, testnum; \
14 bne testreg, x29, fail;
16 # We use a macro hack to simpify code generation for various numbers
19 #define TEST_INSERT_NOPS_0
20 #define TEST_INSERT_NOPS_1 nop; TEST_INSERT_NOPS_0
21 #define TEST_INSERT_NOPS_2 nop; TEST_INSERT_NOPS_1
22 #define TEST_INSERT_NOPS_3 nop; TEST_INSERT_NOPS_2
23 #define TEST_INSERT_NOPS_4 nop; TEST_INSERT_NOPS_3
24 #define TEST_INSERT_NOPS_5 nop; TEST_INSERT_NOPS_4
25 #define TEST_INSERT_NOPS_6 nop; TEST_INSERT_NOPS_5
26 #define TEST_INSERT_NOPS_7 nop; TEST_INSERT_NOPS_6
27 #define TEST_INSERT_NOPS_8 nop; TEST_INSERT_NOPS_7
28 #define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
29 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
32 #-----------------------------------------------------------------------
34 #-----------------------------------------------------------------------
36 #-----------------------------------------------------------------------
37 # Tests for instructions with immediate operand
38 #-----------------------------------------------------------------------
40 #define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
42 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
43 TEST_CASE( testnum, x3, result, \
45 inst x3, x1, SEXT_IMM(imm); \
48 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
49 TEST_CASE( testnum, x1, result, \
51 inst x1, x1, SEXT_IMM(imm); \
54 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
55 TEST_CASE( testnum, x6, result, \
58 inst x3, x1, SEXT_IMM(imm); \
59 TEST_INSERT_NOPS_ ## nop_cycles \
66 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
67 TEST_CASE( testnum, x3, result, \
70 TEST_INSERT_NOPS_ ## nop_cycles \
71 inst x3, x1, SEXT_IMM(imm); \
77 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
78 TEST_CASE( testnum, x1, result, \
79 inst x1, x0, SEXT_IMM(imm); \
82 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
83 TEST_CASE( testnum, x0, 0, \
85 inst x0, x1, SEXT_IMM(imm); \
88 #-----------------------------------------------------------------------
89 # Tests for vector config instructions
90 #-----------------------------------------------------------------------
92 #define TEST_VSETCFGIVL( testnum, nxpr, nfpr, bank, vl, result ) \
93 TEST_CASE( testnum, x1, result, \
94 li x1, (bank << 12); \
95 vsetcfg x1,nxpr,nfpr; \
100 #define TEST_VVCFG( testnum, nxpr, nfpr, bank, vl, result ) \
101 TEST_CASE( testnum, x1, result, \
102 li x1, (bank << 12) | (nfpr << 6) | nxpr; \
108 #define TEST_VSETVL( testnum, nxpr, nfpr, bank, vl, result ) \
109 TEST_CASE( testnum, x1, result, \
110 li x1, (bank << 12); \
111 vsetcfg x1,nxpr,nfpr; \
116 #-----------------------------------------------------------------------
117 # Tests for an instruction with register operands
118 #-----------------------------------------------------------------------
120 #define TEST_R_OP( testnum, inst, result, val1 ) \
121 TEST_CASE( testnum, x3, result, \
126 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
127 TEST_CASE( testnum, x1, result, \
132 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
133 TEST_CASE( testnum, x6, result, \
137 TEST_INSERT_NOPS_ ## nop_cycles \
144 #-----------------------------------------------------------------------
145 # Tests for an instruction with register-register operands
146 #-----------------------------------------------------------------------
148 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
149 TEST_CASE( testnum, x3, result, \
155 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
156 TEST_CASE( testnum, x1, result, \
162 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
163 TEST_CASE( testnum, x2, result, \
169 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
170 TEST_CASE( testnum, x1, result, \
175 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
176 TEST_CASE( testnum, x6, result, \
181 TEST_INSERT_NOPS_ ## nop_cycles \
188 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
189 TEST_CASE( testnum, x3, result, \
192 TEST_INSERT_NOPS_ ## src1_nops \
194 TEST_INSERT_NOPS_ ## src2_nops \
201 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
202 TEST_CASE( testnum, x3, result, \
205 TEST_INSERT_NOPS_ ## src1_nops \
207 TEST_INSERT_NOPS_ ## src2_nops \
214 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
215 TEST_CASE( testnum, x2, result, \
220 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
221 TEST_CASE( testnum, x2, result, \
226 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
227 TEST_CASE( testnum, x1, result, \
231 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
232 TEST_CASE( testnum, x0, 0, \
238 #-----------------------------------------------------------------------
239 # Test memory instructions
240 #-----------------------------------------------------------------------
242 #define TEST_LD_OP( testnum, inst, result, offset, base ) \
243 TEST_CASE( testnum, x3, result, \
245 inst x3, offset(x1); \
248 #define TEST_ST_OP( testnum, load_inst, store_inst, result, offset, base ) \
249 TEST_CASE( testnum, x3, result, \
252 store_inst x2, offset(x1); \
253 load_inst x3, offset(x1); \
256 #define TEST_LD_DEST_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
258 li TESTNUM, testnum; \
261 inst x3, offset(x1); \
262 TEST_INSERT_NOPS_ ## nop_cycles \
270 #define TEST_LD_SRC1_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
272 li TESTNUM, testnum; \
275 TEST_INSERT_NOPS_ ## nop_cycles \
276 inst x3, offset(x1); \
283 #define TEST_ST_SRC12_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
285 li TESTNUM, testnum; \
288 TEST_INSERT_NOPS_ ## src1_nops \
290 TEST_INSERT_NOPS_ ## src2_nops \
291 store_inst x1, offset(x2); \
292 load_inst x3, offset(x2); \
299 #define TEST_ST_SRC21_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
301 li TESTNUM, testnum; \
304 TEST_INSERT_NOPS_ ## src1_nops \
306 TEST_INSERT_NOPS_ ## src2_nops \
307 store_inst x1, offset(x2); \
308 load_inst x3, offset(x2); \
315 #-----------------------------------------------------------------------
316 # Test branch instructions
317 #-----------------------------------------------------------------------
319 #define TEST_BR1_OP_TAKEN( testnum, inst, val1 ) \
321 li TESTNUM, testnum; \
324 bne x0, TESTNUM, fail; \
325 1: bne x0, TESTNUM, 3f; \
327 bne x0, TESTNUM, fail; \
330 #define TEST_BR1_OP_NOTTAKEN( testnum, inst, val1 ) \
332 li TESTNUM, testnum; \
335 bne x0, TESTNUM, 2f; \
336 1: bne x0, TESTNUM, fail; \
340 #define TEST_BR1_SRC1_BYPASS( testnum, nop_cycles, inst, val1 ) \
342 li TESTNUM, testnum; \
345 TEST_INSERT_NOPS_ ## nop_cycles \
351 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2 ) \
353 li TESTNUM, testnum; \
357 bne x0, TESTNUM, fail; \
358 1: bne x0, TESTNUM, 3f; \
359 2: inst x1, x2, 1b; \
360 bne x0, TESTNUM, fail; \
363 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
365 li TESTNUM, testnum; \
369 bne x0, TESTNUM, 2f; \
370 1: bne x0, TESTNUM, fail; \
371 2: inst x1, x2, 1b; \
374 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
376 li TESTNUM, testnum; \
379 TEST_INSERT_NOPS_ ## src1_nops \
381 TEST_INSERT_NOPS_ ## src2_nops \
387 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
389 li TESTNUM, testnum; \
392 TEST_INSERT_NOPS_ ## src1_nops \
394 TEST_INSERT_NOPS_ ## src2_nops \
400 #-----------------------------------------------------------------------
401 # Test jump instructions
402 #-----------------------------------------------------------------------
404 #define TEST_JR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
406 li TESTNUM, testnum; \
409 TEST_INSERT_NOPS_ ## nop_cycles \
411 bne x0, TESTNUM, fail; \
416 #define TEST_JALR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
418 li TESTNUM, testnum; \
421 TEST_INSERT_NOPS_ ## nop_cycles \
423 bne x0, TESTNUM, fail; \
429 #-----------------------------------------------------------------------
431 #-----------------------------------------------------------------------
433 #-----------------------------------------------------------------------
434 # Tests floating-point instructions
435 #-----------------------------------------------------------------------
437 #define TEST_FP_OP_S_INTERNAL( testnum, flags, result, val1, val2, val3, code... ) \
439 li TESTNUM, testnum; \
440 la a0, test_ ## testnum ## _data ;\
453 test_ ## testnum ## _data: \
461 #define TEST_FP_OP_D_INTERNAL( testnum, flags, result, val1, val2, val3, code... ) \
463 li TESTNUM, testnum; \
464 la a0, test_ ## testnum ## _data ;\
477 test_ ## testnum ## _data: \
485 #define TEST_FCVT_S_D( testnum, result, val1 ) \
486 TEST_FP_OP_D_INTERNAL( testnum, 0, double result, val1, 0.0, 0.0, \
487 fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d a0, f3)
489 #define TEST_FCVT_D_S( testnum, result, val1 ) \
490 TEST_FP_OP_S_INTERNAL( testnum, 0, float result, val1, 0.0, 0.0, \
491 fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s a0, f3)
493 #define TEST_FP_OP1_S( testnum, inst, result, val1 ) \
494 TEST_FP_OP_S_INTERNAL( testnum, 0, float result, val1, 0.0, 0.0, \
495 inst f3, f0; fmv.x.s a0, f3)
497 #define TEST_FP_OP1_D( testnum, inst, result, val1 ) \
498 TEST_FP_OP_D_INTERNAL( testnum, 0, double result, val1, 0.0, 0.0, \
499 inst f3, f0; fmv.x.d a0, f3)
501 #define TEST_FP_OP2_S( testnum, inst, flags, result, val1, val2 ) \
502 TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, 0.0, \
503 inst f3, f0, f1; fmv.x.s a0, f3)
505 #define TEST_FP_OP2_D( testnum, inst, flags, result, val1, val2 ) \
506 TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, val2, 0.0, \
507 inst f3, f0, f1; fmv.x.d a0, f3)
509 #define TEST_FP_OP3_S( testnum, inst, flags, result, val1, val2, val3 ) \
510 TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, val3, \
511 inst f3, f0, f1, f2; fmv.x.s a0, f3)
513 #define TEST_FP_OP3_D( testnum, inst, flags, result, val1, val2, val3 ) \
514 TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, val2, val3, \
515 inst f3, f0, f1, f2; fmv.x.d a0, f3)
517 #define TEST_FP_INT_OP_S( testnum, inst, flags, result, val1, rm ) \
518 TEST_FP_OP_S_INTERNAL( testnum, flags, word result, val1, 0.0, 0.0, \
521 #define TEST_FP_INT_OP_D( testnum, inst, flags, result, val1, rm ) \
522 TEST_FP_OP_D_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \
525 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
526 TEST_FP_OP_S_INTERNAL( testnum, 0, word result, val1, val2, 0.0, \
529 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
530 TEST_FP_OP_D_INTERNAL( testnum, 0, dword result, val1, val2, 0.0, \
533 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
535 li TESTNUM, testnum; \
536 la a0, test_ ## testnum ## _data ;\
545 test_ ## testnum ## _data: \
549 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
551 li TESTNUM, testnum; \
552 la a0, test_ ## testnum ## _data ;\
561 test_ ## testnum ## _data: \
566 #-----------------------------------------------------------------------
568 #-----------------------------------------------------------------------
570 #define TEST_ILLEGAL_TVEC_REGID( testnum, nxreg, nfreg, inst, reg1, reg2) \
571 csrs status, SR_EI; \
572 la a0, handler ## testnum; \
574 vsetcfg nxreg, nfreg; \
581 lui a0,%hi(vtcode1 ## testnum); \
582 vf %lo(vtcode1 ## testnum)(a0); \
584 illegal ## testnum: \
589 vtcode1 ## testnum: \
592 vtcode2 ## testnum: \
595 handler ## testnum: \
599 li a1,HWACHA_CAUSE_TVEC_ILLEGAL_REGID; \
602 la a1, illegal ## testnum; \
612 lui a0,%hi(vtcode2 ## testnum); \
613 vf %lo(vtcode2 ## testnum)(a0); \
631 #define TEST_ILLEGAL_VT_REGID( testnum, nxreg, nfreg, inst, reg1, reg2, reg3) \
632 csrs status, SR_EI; \
633 la a0, handler ## testnum; \
635 vsetcfg nxreg, nfreg; \
642 lui a0,%hi(vtcode1 ## testnum); \
643 vf %lo(vtcode1 ## testnum)(a0); \
647 vtcode1 ## testnum: \
649 illegal ## testnum: \
650 inst reg1, reg2, reg3; \
652 vtcode2 ## testnum: \
655 handler ## testnum: \
659 li a1,HWACHA_CAUSE_VF_ILLEGAL_REGID; \
662 la a1,illegal ## testnum; \
671 lui a0,%hi(vtcode2 ## testnum); \
672 vf %lo(vtcode2 ## testnum)(a0); \
690 #-----------------------------------------------------------------------
691 # Pass and fail code (assumes test num is in TESTNUM)
692 #-----------------------------------------------------------------------
694 #define TEST_PASSFAIL \
695 bne x0, TESTNUM, pass; \
702 #-----------------------------------------------------------------------
704 #-----------------------------------------------------------------------