1 #include "riscv_test.h"
2 #include "sv_test_macros.h"
4 RVTEST_RV64U # Define TVM used by program.
7 #define SV_PRED_C_MV_TEST( pred1, pred2, expect1, expect2, expect3 ) \
9 SV_LD_DATA( x6, testdata+0 , 0); \
10 SV_LD_DATA( x7, testdata+8, 0); \
11 SV_LD_DATA( x8, testdata+16, 0); \
20 SET_SV_2CSRS( SV_REG_CSR(1, 3, 0, 3, 1), \
21 SV_REG_CSR(1, 6, 0, 6, 1) ); \
23 SV_PRED_CSR(1, 3, 0, 0, 13, 0), \
24 SV_PRED_CSR(1, 6, 0, 0, 14, 0) );\
35 TEST_SV_IMM(x3, expect1); \
36 TEST_SV_IMM(x4, expect2); \
37 TEST_SV_IMM(x5, expect3);
39 # SV test: vector-vector add different rd and rs1
41 # sets up x6 and x7 with data, sets VL to 2, and carries out
42 # an "x3 = 1 + x6". which actually means "x3 = 1 + x6 *AND* x4 = 1 + x7"
45 RVTEST_CODE_BEGIN # Start of test code.
49 SV_PRED_C_MV_TEST( 0x7, 0x7, 1001, 41, 42 )
50 SV_PRED_C_MV_TEST( 0x3, 0x7, 1001, 41, 4 )
51 SV_PRED_C_MV_TEST( 0x1, 0x7, 1001, 3, 4 )
53 SV_PRED_C_MV_TEST( 0x6, 0x7, 2, 1001, 41 )
54 SV_PRED_C_MV_TEST( 0x6, 0x3, 2, 1001, 41 )
55 SV_PRED_C_MV_TEST( 0x6, 0x1, 2, 1001, 4 )
56 SV_PRED_C_MV_TEST( 0x6, 0x6, 2, 41, 42 )
58 SV_PRED_C_MV_TEST( 0x5, 0x6, 41, 3, 42 )
60 SV_PRED_C_MV_TEST( 0x1, 0x1, 1001, 3, 4 )
61 SV_PRED_C_MV_TEST( 0x2, 0x1, 2, 1001, 4 )
62 SV_PRED_C_MV_TEST( 0x4, 0x1, 2, 3, 1001 )
64 SV_PRED_C_MV_TEST( 0x1, 0x1, 1001, 3, 4 )
65 SV_PRED_C_MV_TEST( 0x1, 0x2, 41, 3, 4 )
66 SV_PRED_C_MV_TEST( 0x1, 0x4, 42, 3, 4 )
68 RVTEST_PASS # Signal success.
71 RVTEST_CODE_END # End of test code.
74 # This section is optional, and this data is NOT saved in the output.
82 # Output data section.
83 RVTEST_DATA_BEGIN # Start of test output data region.
89 RVTEST_DATA_END # End of test output data region.