lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  25  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  29    - EUR
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  34  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  35  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  38    - shared with cole
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  40    - EUR 50, shared with samuel 10%
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  45    - EUR 50, shared with samuel (EUR 350)
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  51    - EUR 200
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  54    - donated
  55    - parent #198
  56    - EUR 200
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  58   - MultiCompUnit (and Function Units) proof
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  60   - donated
  61   - parent #195
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  63
  64 ## Completed but not yet submitted:
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  66    - EUR 800
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
  71    - EUR 800 shared between:
  72    - EUR 500 [[lkcl]]
  73    - EUR 300 [[tplaten]]
  74  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
  76    - EUR 1600
  77  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
  78    - EUR 600
  79  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  80    - EUR 500
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  82  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  86
  87
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  89    - EUR 150
  90    - donated
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
  92    - EUR 200
  93    - donated
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
  95    - EUR 150
  96    - donated
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
  98    - EUR 200
  99    - donated
 100  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 101    - EUR 700
 102    - (lip6.fr donated)
 103  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 104    - (total EUR 400 25% donated by LIP6)
 105    - EUR 100 lkcl
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 107    - EUR 900
 108    - shared with [[lxo]]
 109  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 110    - EUR 1100
 111    - shared with lauri, jacob
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 113    - EUR 1250
 114    - Shared 50% with Staf
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 116    - EUR 300
 117    - Shared with Staf, cole
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 119    - EUR 450
 120    - Shared with Staf
 121  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 123    - EUR 3000
 124    - shared with Staf 50%
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 126    - Project 2019-10-043 06dec2020 wishbone
 127    - EUR (TBD)
 128
 129 ### Project 2019-10-029 14mar2020 coriolis2
 130
 131  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 132    - (total EUR 100 shared 50% with staf)
 133    - EUR 50 lkcl
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 135    - (total EUR 1500 shared 50% with LIP6)
 136    - EUR 750 lkcl
 137  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 138    - (total EUR 400 shared 75% with LIP6)
 139    - EUR 300 lkcl
 140
 141 ### Project 2019-02-012 06dec2020 Core
 142
 143  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 144    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 145  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 146    - EUR 750 donated
 147  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 148    - EUR 1500
 149
 150 ### Project 2019-10-043 06dec2020 wishbone
 151
 152  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 153    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 154  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 155    - EUR 200
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 157    - EUR 100
 158  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 159    - EUR 200
 160  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 161    - EUR 100
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 163    - EUR 200
 164  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 165    - EUR 450
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 167    - EUR 100
 168  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 169    - EUR 200 donated
 170  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 171    - EUR 250 (share with cole)
 172
 173 ### Project 2019-10-032 06dec2020 proofs
 174
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 176    - parent #195
 177    - EUR 400 donated
 178  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 179    - parent #195
 180    - EUR 300 donated
 181  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 182    - EUR 400 donated
 183    - parent #195
 184  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 185    - EUR 400 donated
 186    - parent #195
 187
 188 ## Submitted for NLNet RFP
 189
 190 submitted but not confirmed paid:
 191
 192  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 193
 194 ### Project 2019-02-012 04sep2020 Core
 195
 196  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 197    - EUR 2000 total, shared with florent.  EUR 1200
 198
 199 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 200
 201 ## Paid
 202
 203 donation from NLNet confirmed received:
 204
 205 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 206
 207  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 208     - EUR 2000, python POWER9 simulator
 209     - Shared 50% with [[mnolan]], EUR 1000
 210  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 211     - EUR 250, functions needed for simulator
 212     - Shared 20% with [[mnolan]], EUR 50
 213
 214 ### proofs 2019-10-032
 215
 216  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 217    - EUR 500 shared 20% samuel, EUR 100
 218  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 219    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 220  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 221    - EUR 400 shared 25% [[mnolan]] EUR 100
 222  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 223    - EUR 150
 224
 225 ### wishbone 2019-10-043
 226
 227  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 228    - EUR 500
 229  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 230     - EUR 300
 231  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 232     - EUR 250
 233  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 234    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 235  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 236    - EUR 300
 237  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 238    - EUR 400, 50% shared [[programmerjake]] EUR 200
 239  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 240    - EUR 750, 33% shared [[programmerjake]] EUR 250
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 242    - EUR 200 50% shared, cole, EUR 100
 243  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 244    - EUR 200
 245  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 246    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 247  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 248    - EUR 150
 249  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 250    - EUR 400 shared 50% [[mnolan]] EUR 200
 251  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 252    - EUR 250 shared 40% [[mnolan]] EUR 100
 253  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 254    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 255  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 256    - EUR 300 shared 50% [[mnolan]] EUR 150
 257  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 258    - EUR 750
 259  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 260   - EUR 100
 261  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 262   - EUR 100
 263  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 264    - EUR 100
 265  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 266    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 267
 268 ### Project 2019-02-012 28-apr-2020
 269
 270  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 271    - 6600 scoreboard multi-read/write
 272    - EUR 600
 273  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 274    - Partitioned equals and greater than comparison
 275    - Shared 50% with [[mnolan]]
 276    - EUR 200 (each)
 277  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 278    - partitioned scalar/vector shift
 279    - Shared 50% with [[lkcl]]
 280    - EUR 350 (each)
 281
 282 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 283
 284  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 285     - auto-parser of POWER9
 286     - Shared 50% with [[mnolan]]
 287     - EUR 500 (each)
 288
 289 ### Project 2019-10-029 Date 14mar2020
 290
 291 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 292   - EUR 1200
 293
 294 ### Project 2019-02-012 Date 12mar2020
 295
 296 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 297 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 298 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 299 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 300
 301 ### Project 2019-02-012 Date 28jan2020
 302
 303 * admin tasks
 304 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 305