microwatt.core

   1 CAPI=2:
   2
   3 name : ::microwatt:0
   4
   5 filesets:
   6   core:
   7     files:
   8       - decode_types.vhdl
   9       - wishbone_types.vhdl
  10       - common.vhdl
  11       - fetch1.vhdl
  12       - fetch2.vhdl
  13       - decode1.vhdl
  14       - helpers.vhdl
  15       - decode2.vhdl
  16       - register_file.vhdl
  17       - cr_file.vhdl
  18       - crhelpers.vhdl
  19       - ppc_fx_insns.vhdl
  20       - sim_console.vhdl
  21       - logical.vhdl
  22       - countzero.vhdl
  23       - gpr_hazard.vhdl
  24       - cr_hazard.vhdl
  25       - control.vhdl
  26       - execute1.vhdl
  27       - loadstore1.vhdl
  28       - dcache.vhdl
  29       - multiply.vhdl
  30       - divider.vhdl
  31       - rotator.vhdl
  32       - writeback.vhdl
  33       - insn_helpers.vhdl
  34       - core.vhdl
  35       - icache.vhdl
  36       - plru.vhdl
  37       - cache_ram.vhdl
  38       - core_debug.vhdl
  39       - utils.vhdl
  40     file_type : vhdlSource-2008
  41
  42   soc:
  43     files:
  44       - wishbone_arbiter.vhdl
  45       - wishbone_debug_master.vhdl
  46       - wishbone_bram_wrapper.vhdl
  47       - soc.vhdl
  48       - xics.vhdl
  49       - syscon.vhdl
  50     file_type : vhdlSource-2008
  51
  52   fpga:
  53     files:
  54       - fpga/main_bram.vhdl
  55       - fpga/soc_reset.vhdl
  56       - fpga/pp_fifo.vhd
  57       - fpga/pp_soc_uart.vhd
  58       - fpga/pp_utilities.vhd
  59       - fpga/firmware.hex : {copyto : firmware.hex, file_type : user}
  60     file_type : vhdlSource-2008
  61
  62   debug_xilinx:
  63     files:
  64       - dmi_dtm_xilinx.vhdl : {file_type : vhdlSource-2008}
  65
  66   debug_dummy:
  67     files:
  68       - dmi_dtm_dummy.vhdl : {file_type : vhdlSource-2008}
  69
  70   nexys_a7:
  71     files:
  72       - fpga/nexys_a7.xdc : {file_type : xdc}
  73       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  74       - fpga/top-generic.vhdl : {file_type : vhdlSource-2008}
  75
  76   nexys_video:
  77     files:
  78       - fpga/nexys-video.xdc : {file_type : xdc}
  79       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  80       - fpga/top-nexys-video.vhdl : {file_type : vhdlSource-2008}
  81
  82   arty_a7:
  83     files:
  84       - fpga/arty_a7.xdc : {file_type : xdc}
  85       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  86       - fpga/top-arty.vhdl : {file_type : vhdlSource-2008}
  87
  88   cmod_a7-35:
  89     files:
  90       - fpga/cmod_a7-35.xdc : {file_type : xdc}
  91       - fpga/clk_gen_mcmm.vhd : {file_type : vhdlSource-2008}
  92       - fpga/top-generic.vhdl : {file_type : vhdlSource-2008}
  93
  94   litedram:
  95       depend : [":microwatt:litedram"]
  96
  97 targets:
  98   nexys_a7:
  99     default_tool: vivado
 100     filesets: [core, nexys_a7, soc, fpga, debug_xilinx]
 101     parameters :
 102       - memory_size
 103       - ram_init_file
 104       - clk_input
 105       - clk_frequency
 106       - disable_flatten_core
 107     tools:
 108       vivado: {part : xc7a100tcsg324-1}
 109     toplevel : toplevel
 110
 111   nexys_video-nodram:
 112     default_tool: vivado
 113     filesets: [core, nexys_video, soc, fpga, debug_xilinx]
 114     parameters :
 115       - memory_size
 116       - ram_init_file
 117       - clk_input
 118       - clk_frequency
 119       - disable_flatten_core
 120     tools:
 121       vivado: {part : xc7a200tsbg484-1}
 122     toplevel : toplevel
 123
 124   nexys_video:
 125     default_tool: vivado
 126     filesets: [core, nexys_video, soc, fpga, debug_xilinx, litedram]
 127     parameters:
 128       - memory_size
 129       - ram_init_file
 130       - use_litedram=true
 131       - disable_flatten_core
 132     generate: [dram_nexys_video]
 133     tools:
 134       vivado: {part : xc7a200tsbg484-1}
 135     toplevel : toplevel
 136
 137   arty_a7-35-nodram:
 138     default_tool: vivado
 139     filesets: [core, arty_a7, soc, fpga, debug_xilinx]
 140     parameters :
 141       - memory_size
 142       - ram_init_file
 143       - clk_input
 144       - clk_frequency
 145       - disable_flatten_core
 146     tools:
 147       vivado: {part : xc7a35ticsg324-1L}
 148     toplevel : toplevel
 149
 150   arty_a7-35:
 151     default_tool: vivado
 152     filesets: [core, arty_a7, soc, fpga, debug_xilinx, litedram]
 153     parameters :
 154       - memory_size
 155       - ram_init_file
 156       - use_litedram=true
 157       - disable_flatten_core
 158     generate: [dram_arty]
 159     tools:
 160       vivado: {part : xc7a35ticsg324-1L}
 161     toplevel : toplevel
 162
 163   arty_a7-100-nodram:
 164     default_tool: vivado
 165     filesets: [core, arty_a7, soc, fpga, debug_xilinx]
 166     parameters :
 167       - memory_size
 168       - ram_init_file
 169       - clk_input
 170       - clk_frequency
 171       - disable_flatten_core
 172     tools:
 173       vivado: {part : xc7a100ticsg324-1L}
 174     toplevel : toplevel
 175
 176   arty_a7-100:
 177     default_tool: vivado
 178     filesets: [core, arty_a7, soc, fpga, debug_xilinx, litedram]
 179     parameters:
 180       - memory_size
 181       - ram_init_file
 182       - use_litedram=true
 183       - disable_flatten_core
 184     generate: [dram_arty]
 185     tools:
 186       vivado: {part : xc7a100ticsg324-1L}
 187     toplevel : toplevel
 188
 189   cmod_a7-35:
 190     default_tool: vivado
 191     filesets: [core, cmod_a7-35, soc, fpga, debug_xilinx]
 192     parameters :
 193       - memory_size
 194       - ram_init_file
 195       - reset_low=false
 196       - clk_input=12000000
 197       - clk_frequency
 198       - disable_flatten_core
 199     tools:
 200       vivado: {part : xc7a35tcpg236-1}
 201     toplevel : toplevel
 202
 203   synth:
 204     filesets: [core, soc]
 205     tools:
 206       vivado: {pnr : none}
 207     toplevel: core
 208
 209 generate:
 210   dram_arty:
 211     generator: litedram_gen
 212     parameters: {board : arty}
 213
 214   dram_nexys_video:
 215     generator: litedram_gen
 216     parameters: {board : nexys-video}
 217
 218 parameters:
 219   memory_size:
 220     datatype    : int
 221     description : On-chip memory size (bytes)
 222     paramtype   : generic
 223     default     : 16384
 224
 225   ram_init_file:
 226     datatype    : file
 227     description : Initial on-chip RAM contents
 228     paramtype   : generic
 229
 230   reset_low:
 231     datatype    : bool
 232     description : External reset button polarity
 233     paramtype   : generic
 234
 235   clk_input:
 236     datatype    : int
 237     description : Clock input frequency in HZ (for top-generic based boards)
 238     paramtype   : generic
 239     default     : 100000000
 240
 241   clk_frequency:
 242     datatype    : int
 243     description : Generated system clock frequency in HZ (for top-generic based boards)
 244     paramtype   : generic
 245     default     : 100000000
 246
 247   disable_flatten_core:
 248     datatype    : bool
 249     description : Prevent Vivado from flattening the main core components
 250     paramtype   : generic
 251     default     : false
 252
 253   use_litedram:
 254     datatype    : bool
 255     description : Use liteDRAM
 256     paramtype   : generic
 257     default     : false