microwatt.core

   1 CAPI=2:
   2
   3 name : ::microwatt:0
   4
   5 filesets:
   6   core:
   7     files:
   8       - decode_types.vhdl
   9       - wishbone_types.vhdl
  10       - common.vhdl
  11       - fetch1.vhdl
  12       - fetch2.vhdl
  13       - decode1.vhdl
  14       - helpers.vhdl
  15       - decode2.vhdl
  16       - register_file.vhdl
  17       - cr_file.vhdl
  18       - crhelpers.vhdl
  19       - ppc_fx_insns.vhdl
  20       - sim_console.vhdl
  21       - execute1.vhdl
  22       - execute2.vhdl
  23       - loadstore1.vhdl
  24       - loadstore2.vhdl
  25       - multiply.vhdl
  26       - divider.vhdl
  27       - writeback.vhdl
  28       - insn_helpers.vhdl
  29       - core.vhdl
  30       - icache.vhdl
  31       - core_debug.vhdl
  32     file_type : vhdlSource-2008
  33
  34   soc:
  35     files:
  36       - wishbone_arbiter.vhdl
  37       - wishbone_debug_master.vhdl
  38       - soc.vhdl
  39     file_type : vhdlSource-2008
  40
  41   fpga:
  42     files:
  43       - fpga/pp_fifo.vhd
  44       - fpga/mw_soc_memory.vhdl
  45       - fpga/soc_reset.vhdl
  46       - fpga/pp_soc_uart.vhd
  47       - fpga/pp_utilities.vhd
  48       - fpga/toplevel.vhdl
  49       - fpga/firmware.hex : {copyto : firmware.hex, file_type : user}
  50     file_type : vhdlSource-2008
  51
  52   debug_xilinx:
  53     files:
  54       - dmi_dtm_xilinx.vhdl : {file_type : vhdlSource-2008}
  55
  56   debug_dummy:
  57     files:
  58       - dmi_dtm_dummy.vhdl : {file_type : vhdlSource-2008}
  59
  60   nexys_a7:
  61     files:
  62       - fpga/nexys_a7.xdc : {file_type : xdc}
  63       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  64
  65   nexys_video:
  66     files:
  67       - fpga/nexys-video.xdc : {file_type : xdc}
  68       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  69
  70   arty_a7:
  71     files:
  72       - fpga/arty_a7.xdc : {file_type : xdc}
  73       - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
  74
  75   cmod_a7-35:
  76     files:
  77       - fpga/cmod_a7-35.xdc : {file_type : xdc}
  78       - fpga/clk_gen_mcmm.vhd : {file_type : vhdlSource-2008}
  79
  80 targets:
  81   nexys_a7:
  82     default_tool: vivado
  83     filesets: [core, nexys_a7, soc, fpga, debug_xilinx]
  84     parameters : [memory_size, ram_init_file]
  85     tools:
  86       vivado: {part : xc7a100tcsg324-1}
  87     toplevel : toplevel
  88
  89   nexys_video:
  90     default_tool: vivado
  91     filesets: [core, nexys_video, soc, fpga, debug_xilinx]
  92     parameters : [memory_size, ram_init_file]
  93     tools:
  94       vivado: {part : xc7a200tsbg484-1}
  95     toplevel : toplevel
  96
  97   arty_a7-35:
  98     default_tool: vivado
  99     filesets: [core, arty_a7, soc, fpga, debug_xilinx]
 100     parameters : [memory_size, ram_init_file]
 101     tools:
 102       vivado: {part : xc7a35ticsg324-1L}
 103     toplevel : toplevel
 104
 105   arty_a7-100:
 106     default_tool: vivado
 107     filesets: [core, arty_a7, soc, fpga, debug_xilinx]
 108     parameters : [memory_size, ram_init_file]
 109     tools:
 110       vivado: {part : xc7a100ticsg324-1L}
 111     toplevel : toplevel
 112
 113   cmod_a7-35:
 114     default_tool: vivado
 115     filesets: [core, cmod_a7-35, soc, fpga, debug_xilinx]
 116     parameters : [memory_size, ram_init_file, reset_low=false]
 117     tools:
 118       vivado: {part : xc7a35tcpg236-1}
 119     toplevel : toplevel
 120
 121   synth:
 122     filesets: [core, soc]
 123     tools:
 124       vivado: {pnr : none}
 125     toplevel: core
 126
 127 parameters:
 128   memory_size:
 129     datatype    : int
 130     description : On-chip memory size (bytes)
 131     paramtype   : generic
 132
 133   ram_init_file:
 134     datatype    : file
 135     description : Initial on-chip RAM contents
 136     paramtype   : generic
 137
 138   reset_low:
 139     datatype    : bool
 140     description : External reset button polarity
 141     paramtype   : generic