39 file_type : vhdlSource-2008
43 - wishbone_arbiter.vhdl
44 - wishbone_debug_master.vhdl
46 file_type : vhdlSource-2008
51 - fpga/mw_soc_memory.vhdl
53 - fpga/pp_soc_uart.vhd
54 - fpga/pp_utilities.vhd
56 - fpga/firmware.hex : {copyto : firmware.hex, file_type : user}
57 file_type : vhdlSource-2008
61 - dmi_dtm_xilinx.vhdl : {file_type : vhdlSource-2008}
65 - dmi_dtm_dummy.vhdl : {file_type : vhdlSource-2008}
69 - fpga/nexys_a7.xdc : {file_type : xdc}
70 - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
74 - fpga/nexys-video.xdc : {file_type : xdc}
75 - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
79 - fpga/arty_a7.xdc : {file_type : xdc}
80 - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
84 - fpga/cmod_a7-35.xdc : {file_type : xdc}
85 - fpga/clk_gen_mcmm.vhd : {file_type : vhdlSource-2008}
90 filesets: [core, nexys_a7, soc, fpga, debug_xilinx]
96 - disable_flatten_core
98 vivado: {part : xc7a100tcsg324-1}
103 filesets: [core, nexys_video, soc, fpga, debug_xilinx]
109 - disable_flatten_core
111 vivado: {part : xc7a200tsbg484-1}
116 filesets: [core, arty_a7, soc, fpga, debug_xilinx]
122 - disable_flatten_core
124 vivado: {part : xc7a35ticsg324-1L}
129 filesets: [core, arty_a7, soc, fpga, debug_xilinx]
135 - disable_flatten_core
137 vivado: {part : xc7a100ticsg324-1L}
142 filesets: [core, cmod_a7-35, soc, fpga, debug_xilinx]
149 - disable_flatten_core
151 vivado: {part : xc7a35tcpg236-1}
155 filesets: [core, soc]
163 description : On-chip memory size (bytes)
168 description : Initial on-chip RAM contents
173 description : External reset button polarity
178 description : Clock input frequency in HZ (for top-generic based boards)
184 description : Generated system clock frequency in HZ (for top-generic based boards)
188 disable_flatten_core:
190 description : Prevent Vivado from flattening the main core components