40 file_type : vhdlSource-2008
44 - wishbone_arbiter.vhdl
45 - wishbone_debug_master.vhdl
46 - wishbone_bram_wrapper.vhdl
49 file_type : vhdlSource-2008
56 - fpga/pp_soc_uart.vhd
57 - fpga/pp_utilities.vhd
59 - fpga/firmware.hex : {copyto : firmware.hex, file_type : user}
60 file_type : vhdlSource-2008
64 - dmi_dtm_xilinx.vhdl : {file_type : vhdlSource-2008}
68 - dmi_dtm_dummy.vhdl : {file_type : vhdlSource-2008}
72 - fpga/nexys_a7.xdc : {file_type : xdc}
73 - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
77 - fpga/nexys-video.xdc : {file_type : xdc}
78 - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
82 - fpga/arty_a7.xdc : {file_type : xdc}
83 - fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
87 - fpga/cmod_a7-35.xdc : {file_type : xdc}
88 - fpga/clk_gen_mcmm.vhd : {file_type : vhdlSource-2008}
93 filesets: [core, nexys_a7, soc, fpga, debug_xilinx]
99 - disable_flatten_core
101 vivado: {part : xc7a100tcsg324-1}
106 filesets: [core, nexys_video, soc, fpga, debug_xilinx]
112 - disable_flatten_core
114 vivado: {part : xc7a200tsbg484-1}
119 filesets: [core, arty_a7, soc, fpga, debug_xilinx]
125 - disable_flatten_core
127 vivado: {part : xc7a35ticsg324-1L}
132 filesets: [core, arty_a7, soc, fpga, debug_xilinx]
138 - disable_flatten_core
140 vivado: {part : xc7a100ticsg324-1L}
145 filesets: [core, cmod_a7-35, soc, fpga, debug_xilinx]
152 - disable_flatten_core
154 vivado: {part : xc7a35tcpg236-1}
158 filesets: [core, soc]
166 description : On-chip memory size (bytes)
172 description : Initial on-chip RAM contents
177 description : External reset button polarity
182 description : Clock input frequency in HZ (for top-generic based boards)
188 description : Generated system clock frequency in HZ (for top-generic based boards)
192 disable_flatten_core:
194 description : Prevent Vivado from flattening the main core components