openpower/isa/sprset.mdwn

   1 # Move To Special Purpose Register
   2
   3 XFX-Form
   4
   5 * mtspr SPR,RS
   6
   7 Pseudo-code:
   8
   9     n <- spr[5:9] || spr[0:4]
  10     switch (n)
  11       case(13): see(Book_III_p974)
  12       case(808, 809, 810, 811):
  13       default:
  14         if length(SPR(n)) = 64 then
  15           SPR(n) <- (RS)
  16         else
  17           SPR(n) <- (RS) [32:63]
  18
  19 Special Registers Altered:
  20
  21     See spec 3.3.17
  22
  23 # Move From Special Purpose Register
  24
  25 XFX-Form
  26
  27 * mfspr RT,SPR
  28
  29 Pseudo-code:
  30
  31     n <- spr[5:9] || spr[0:4]
  32     switch (n)
  33       case(129): see(Book_III_p975)
  34       case(808, 809, 810, 811):
  35       default:
  36         if length(SPR(n)) = 64 then
  37           RT <- SPR(n)
  38         else
  39           RT <- [0]*32 || SPR(n)
  40
  41 Special Registers Altered:
  42
  43     None
  44
  45 # Move to CR from XER Extended
  46
  47 X-Form
  48
  49 * mcrxrx BF
  50
  51 Pseudo-code:
  52
  53     CR[4*BF+32:4*BF+35] <-  XER[OV] || XER[OV32] || XER[CA] || XER[CA32]
  54
  55 Special Registers Altered:
  56
  57     CR field BF
  58
  59 # Move To One Condition Register Field
  60
  61 XFX-Form
  62
  63 * mtocrf FXM,RS
  64
  65 Pseudo-code:
  66
  67     n <- 7
  68     do i = 7 to 0
  69       if FXM[i] = 1 then
  70         n <- i
  71     CR[4*n+32:4*n+35] <- (RS)[4*n+32:4*n+35]
  72
  73 Special Registers Altered:
  74
  75     CR field selected by FXM
  76
  77 # Move To Condition Register Fields
  78
  79 XFX-Form
  80
  81 * mtcrf FXM,RS
  82
  83 Pseudo-code:
  84
  85     do n = 0 to 7
  86       if FXM[n] = 1 then
  87         CR[4*n+32:4*n+35] <- (RS)[4*n+32:4*n+35]
  88
  89 Special Registers Altered:
  90
  91     CR fields selected by mask
  92
  93 # Move From One Condition Register Field
  94
  95 XFX-Form
  96
  97 * mfocrf RT,FXM
  98
  99 Pseudo-code:
 100
 101     done <- 0
 102     RT <- [0]*64
 103     do n = 0 to 7
 104       if (done = 0) & (FXM[n] = 1) then
 105         RT[4*n+32:4*n+35] <- CR[4*n+32:4*n+35]
 106         done <- 1
 107
 108 Special Registers Altered:
 109
 110     None
 111
 112 # Move From Condition Register
 113
 114 XFX-Form
 115
 116 * mfcr RT
 117
 118 Pseudo-code:
 119
 120     RT <- [0]*32 || CR
 121
 122 Special Registers Altered:
 123
 124     None
 125
 126 # Set Boolean
 127
 128 X-Form
 129
 130 * setb RT,BFA
 131
 132 Pseudo-code:
 133
 134     if CR[4*BFA+32] = 1 then
 135        RT <- 0xFFFF_FFFF_FFFF_FFFF
 136     else if CR[4*BFA+33]=1 then
 137        RT <- 0x0000_0000_0000_0001
 138     else
 139        RT <- 0x0000_0000_0000_0000
 140
 141 Special Registers Altered:
 142
 143     None
 144
 145 # Move To Machine State Register
 146
 147 X-Form
 148
 149 * mtmsr RS,L1
 150
 151 Pseudo-code:
 152
 153     if L1 = 0 then
 154         MSR[48] <- (RS)[48] | (RS)[49]
 155         MSR[58] <- (RS)[58] | (RS)[49]
 156         MSR[59] <- (RS)[59] | (RS)[49]
 157         MSR[32:40] <- (RS)[32:40]
 158         MSR[42:47] <- (RS)[42:47]
 159         MSR[49:50] <- (RS)[49:50]
 160         MSR[52:57] <- (RS)[52:57]
 161         MSR[60:62] <- (RS)[60:62]
 162     else
 163         MSR[48] <- (RS)[48]
 164         MSR[62] <- (RS)[62]
 165
 166 Special Registers Altered:
 167
 168     MSR
 169
 170 # Move To Machine State Register
 171
 172 X-Form
 173
 174 * mtmsrd RS,L1
 175
 176 Pseudo-code:
 177
 178     if L1 = 0 then
 179         if (MSR[29:31] != 0b010) | ((RS)[29:31] != 0b000) then
 180             MSR[29:31] <- (RS)[29:31]
 181         MSR[48] <- (RS)[48] | (RS)[49]
 182         MSR[58] <- (RS)[58] | (RS)[49]
 183         MSR[59] <- (RS)[59] | (RS)[49]
 184         MSR[0:2] <- (RS)[0:2]
 185         MSR[4:28] <- (RS)[4:28]
 186         MSR[32:40] <- (RS)[32:40]
 187         MSR[42:47] <- (RS)[42:47]
 188         MSR[49:50] <- (RS)[49:50]
 189         MSR[52:57] <- (RS)[52:57]
 190         MSR[60:62] <- (RS)[60:62]
 191     else
 192         MSR[48] <- (RS)[48]
 193         MSR[62] <- (RS)[62]
 194
 195 Special Registers Altered:
 196
 197     MSR
 198
 199 # Move From Machine State Register
 200
 201 X-Form
 202
 203 * mfmsr RT
 204
 205 Pseudo-code:
 206
 207     RT <- MSR
 208
 209 Special Registers Altered:
 210
 211     None
 212