openpower/sv/po9_encoding/discussion.mdwn

   1 [[!toc]]
   2
   3 # introduction
   4
   5 the purpose of this page is to create and evaluate alternative
   6 encoding schemes that allow for a hybrid mixture of
   7 (ultra-precious) 32-bit and 64-bit (actually `x86 REP`-like
   8 prefixed) instructions.
   9
  10 a specific view to attaining high-speed massive-wide multi-issue decode
  11 is a high priority.  therefore especially length-detection must be kept
  12 brutally simple.
  13
  14 # **superseded** alternative 32-64 encoding (1)
  15
  16 conflict to resolve: EXT90x and EXT232. they are indistinguishable.
  17
  18 ```
  19 |0-5| 6-27 28 29|30-31|32|33-35|36-37| 38-59 | 60-63 | Description      |
  20 |---|-----|-----|-----|--|-----|-----|-------|-------|------------------|
  21 |PO9| rm0 | 0 0 | 0 0 | 0  000   rm1 |  xxxx | 0000  | SVP64:EXT900     |
  22 |PO9| rm0 | 0 0 | 0 0 | 1  000   rm1 |  xxxx | 0000  | SSingle:EXT900   |
  23 |PO9| xxx | x 0 | 0 0 | x !zero0     |  xxxx | !zero1| 55-bit RESERVED  |
  24 |PO9| xxx | 0 1 | 0 0 |              32-bit EXT900 (Vectorizable)       |
  25 |PO9| xxx | 1 1 | 0 0 |              32-bit EXT901 (Unvectorizable)     |
  26 |PO9|   !ZERO   | 0 0 |  1 | DWi                   | SSingle:EXT232-263 |
  27 |PO9|   0000    | 0 0 |  1 | DWi                   | Scalar EXT232-263  |
  28 |PO9|   RM      | 1 0 |  1 | DWi                   | SVP64:EXT232-263   |
  29 |PO9|   0000    | 0 1 | Defined Word-instruction   | 32-bit Unvec in 64b|
  30 |PO9|   !ZERO   | 0 1 | Defined Word-instruction   | SSingle:EXT000-063 |
  31 |PO9|   RM      | 1 1 | Defined Word-instruction   | SVP64:EXT000-063   |
  32 ```
  33
  34 Fields:
  35
  36 * `RM`: 24-bit SVP64 prefix
  37 * `RM <- rm0 || rm1` split field
  38 * `!zero0 || !zero1` a split field that must not be zero
  39
  40 Length detection:
  41
  42 ```
  43     if PO1                   return 64
  44     elif not PO9             return 32
  45     elif Word[31] = 1        return 64
  46     elif Word[29:30] = 0b10  return 32
  47     elif Word[29:30] = 0b00  return 64
  48     else                     return 32
  49 ```
  50
  51 Instruction allocation restrictions:
  52
  53 * setvl is Unvectorizable but needs more space later: use 55-bit
  54 * likewise svshape svindex and svshape2, all these need 32-bit
  55 * svstep *is* Vectorizable but needs to be encoded 32-bit in order
  56   to reduce loop-size
  57 * space for 32-bit instructions is needed: some instructions
  58   just make no sense if done as 64-bit because they **replace**
  59   two 32-bit instructions.
  60 * but those types of space-saving instructions
  61   **also need to be Vectorizable**
  62
  63 # **superseded** alternative 32-64 encoding (2)
  64
  65 requires reducing SVP64Single to 23 bits. luckily there are 2 spare
  66
  67 the complexity of attempting to fit 32-bit instructions into
  68 PO9 is very high. encoding (1) attempts to fit `setvl` etc. into
  69 32-bit but it is very tight.  the entire EXT900 area would be
  70 taken up by the SVP64 Management instructions, below, defeating
  71 the purpose of having it.
  72
  73 * `setvl` - Unvectorizable, EXT0xx, `RT RA CTR SVSTATE`, 6-bit XO (including Rc=1)
  74 * `psetvl` - Unvectorizable, EXT1xx, ditto
  75 * `svstep` - Vectorizable, either EXT900 (very precious) or EXT1xx (better), `RT, SVSTATE`, 6-bit XO (including Rc=1)
  76 * `svindex` - Unvectorizable, EXT0xx, `SVSTATE,SVSHAPE0-3`, 5-bit XO
  77 * `psvindex` - Unvectorizable, EXT1xx, ditto
  78 * `svstep(2)` - Unvectorizable, EXT0xx, `SVSTATE,SVSHAPE0-3`, 5-bit XO
  79 * `svstep(2)` - Unvectorizable, EXT1xx, ditto
  80
  81 ```
  82 |0-5| 6-28|29 30 31|32|33-36|37 | 38-60 | 61-63 | Description      |
  83 |---|-----|--------|--|-----|---|-------|-------|------------------|
  84 |PO9| rm0 | 1  0 0 | 0 0000  rm1|  xxxx | 000   | SVP64:EXT900     |
  85 |PO9|!ZERO| 1  0 0 | 0 1000  1  |  xxxx | 000   | SSingle:EXT900   |
  86 |PO9| xxx | 1  0 0 | 0 !zero0   |  xxxx | !zero1| 55-bit RESERVED  |
  87 |PO9| xxx | 0  0 0 |            32-bit EXT900                      |
  88 |PO9|!ZERO| 1  0 0 |  1 | DWi                 | SSingle:EXT232-263 |
  89 |PO9| 000 | 1  0 0 |  1 | DWi                 | Scalar EXT232-263  |
  90 |PO9|  nnnn  | 1 0 |  1 | DWi                 | SVP64:EXT232-263   |
  91 |PO9|  0000  | 0 1 | Defined Word-instruction | 32-bit Unvec in 64b|
  92 |PO9|!ZERO   | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
  93 |PO9|  nnnn  | 1 1 | Defined Word-instruction | SVP64:EXT000-063   |
  94 ```
  95
  96 Length detection:
  97
  98 ```
  99     if PO1                   return 64
 100     elif not PO9             return 32
 101     elif Word[29:31] = 0b000 return 32
 102     else                     return 64
 103 ```
 104
 105 # alternative hybrid 32-64 encoding (3) **current**
 106
 107 aim of this idea is to attempt simplification of area identification
 108 and length.  the 55-bit area is eliminated and may only be reintroduced
 109 by sacrificing parts of EXT200-231, bear in mind that EXT240 is already
 110 unavailable (used by EXT900).
 111
 112 ```
 113 |0-5| 6-29   |30 31|32 |33-37   | 38-61 | 62-63 | Description      |
 114 |---|--------|-----|---|--------|-------|-------|------------------|
 115 |PO9| xxxx   | 0 0 | (next new instruction)     |  32-bit EXT900   |
 116 |PO9| 0000   | 1 0 | 0 | 10001  |  //// |  00   | RESERVED         |
 117 |PO9| !ZERO  | 1 0 | 0 | 10001  |  xxxx |  00   | SSingle:EXT900   |
 118 |PO9| SVRM   | 1 0 | 0 | 10001  |  xxxx |  01   | SVP64:EXT900     |
 119 |PO9| ////   | 1 0 | 0 | 10001  |  //// |  10   | RESERVED         |
 120 |PO9| ////   | 1 0 | 0 | 10001  |  //// |  11   | RESERVED         |
 121 |PO9| !ZERO  | 1 0 | 0 | !PO9   |     xxxx      | SSingle:EXT232-263 |
 122 |PO9|  0000  | 1 0 | 0 | !PO9   |     xxxx      | Scalar EXT232-263  |
 123 |PO9|  SVRM  | 1 0 | 1 | !PO9   |     xxxx      | SVP64:EXT232-263   |
 124 |PO9|  0000  | 0 1 | Defined Word-instruction   | 32-bit Unvec in 64b|
 125 |PO9| !ZERO  | 0 1 | Defined Word-instruction   | SSingle:EXT000-063 |
 126 |PO9|  SVRM  | 1 1 | Defined Word-instruction   | SVP64:EXT000-063   |
 127 ```
 128
 129 **Notes**:
 130
 131 * with `setvl` `svindex` `svshape` and `svshape2` being Unvectorizable Management
 132 instructions requiring 6-bit `XO` and needing EXT1xx variants later, they are
 133 best placed in EXT0xx.  EXT900 is Vectorizable and extremely precious.  Further
 134 complication of Decode to create Vectorized EXT900 and Unvectorized EXT901
 135 is inadviseable (rejected in alternative 1)
 136 * EXT200-231 is intended to be partially-filled with LD/ST-Immediate-Postincrement
 137   and it is strongly recommended that the exact same Primary Opcode be
 138   used, matching the lower 5 bits. `lzbu` is EXT033, therefore `lzbup` is
 139   recommended to be EXT233. This will greatly simplify Decode.
 140 * With no "overlapping" Encodings permitted on top of EXT232-263 (except
 141   EXT240) Speculative Decode may begin early in Multi-Issue systems safe
 142   that for the most part the 32-bit instruction is either going to be
 143   EXT0xx or EXT2xx, regardless of whether it is SVP64-Prefixed.
 144   LD/ST-Immediate-Postincrement discernment from
 145   LD/ST-Immediate is delayed, but Decode of other EXT232-263 operations
 146   are *also delayed* pending identification.
 147
 148
 149 **Identification**:
 150
 151 The following identification-criteria may be easily verified by taking
 152 a copy of the table above and striking out each line that fails each
 153 test.  Only EXT000-063 is not by a "process of elimination" (if ... return True)
 154
 155 **Length detection**: (critically-important to be short)
 156
 157 ```
 158     if PO1                   return 64
 159     elif not PO9             return 32
 160     elif Word[30:31] = 0b00  return 32
 161     else                     return 64
 162 ```
 163
 164 **EXT232-263:**
 165
 166 ```
 167     if not PO9                return False    # eliminate EXT900
 168     if Word[30:31] == 0b00    return False    # eliminate EXT0xx
 169     if Word[31] == 0b1        return False    # eliminate EXT900 and reserved areas
 170     if Word[33:37] != 0b10001 return False
 171     return True
 172 ```
 173
 174 **EXT900:**
 175
 176 ```
 177     # easy first step
 178     if not PO9                 return False
 179     # eliminate EXT0xx, 32-Unvec-in-64b
 180     if Word[31] = 0b1          return False
 181     # eliminate EXT2xx
 182     if Word[30:31] =  0b10 and
 183        Word[33:37] != 0b10001   return False
 184     # eliminate currently-RESERVED areas
 185     if Word[30:31] =  0b10 and
 186        Word[62]    =  0b1      return False
 187     # eliminate final RESERVED area
 188     if Word[30:31] =  0b10 and
 189        Word[62:63] =  0b00 and
 190        Word[6:29 ] =  0x000000 return False
 191     # last-remaining is EXT900
 192     return True
 193 ```
 194
 195 **EXT000-063**: (includes Prefixed)
 196
 197 ```
 198     if PO1                     return False # or other reserved
 199     if not PO9                 return True  # prefixed needs more
 200     # eliminate EXT900
 201     if Word[30:31] =  0b00     return False
 202     # eliminate Prefixed-EXT900, RESERVED and EXT200
 203     if Word[31]    =  0b0      return False
 204     # eliminate 32-bit Unvec in 64b area
 205     if Word[30:31] =  0b01 and
 206        Word[6:29 ] =  0x000000 return False
 207     return True
 208 ```
 209
 210 **SVP64**:
 211
 212 ```
 213     # easy-elimination, first
 214     if not PO9                 return False
 215     if Word[30]    =  0b0      return False
 216     # eliminate anything not SVP64:EXT900
 217     if Word[30:31] =  0b10 and
 218        Word[33:37] = 0b10001 and
 219        Word[62:63] != 0b01    return False
 220     # eliminate anything not SVP64:EXT200-231
 221     if Word[31:32] =  0b00    return False
 222     # all remaining combinations are SVP64:EXTnnn
 223     return True
 224 ```
 225
 226 **SVP64Single**:
 227
 228 ```
 229     # easy-elimination, first
 230     if not PO9                 return False
 231     # eliminate 32-bit EXT900
 232     if Word[30:31] =  0b00     return False
 233     # eliminate SVP64:EXT000-063
 234     if Word[30:31] =  0b11     return False
 235     # eliminate anything "Identity"
 236     if  Word[6:29 ] =  0x000000 return False
 237     # eliminate SVP64:EXT200-231
 238     if Word[30:32] =  0b101     return False
 239     # eliminate anything not SSingle:EXT900
 240     if Word[30:31] =  0b10 and
 241        Word[33:37] = 0b10001 and
 242        Word[62:63] != 0b00      return False
 243     # everything left is SVP64Single
 244     return True
 245 ```
 246
 247 **RESERVED**: (no need to pass for further detailed decode)
 248
 249 ```
 250     # easy-elimination, first
 251     if not PO9                 return False
 252     # eliminate EXT900
 253     if Word[30:31] =  0b00     return False
 254     # eliminate SVP64:EXT000-031
 255     if Word[30:31] =  0b11     return False
 256     # eliminate SSingle:EXT000-063
 257     if Word[6:29 ] != 0x000000 and
 258        Word[30:31]  =  0b01    return False
 259     # eliminate EXT200-231
 260     if Word[30:31] =  0b10 and
 261        Word[33:37] = 0b10001   return False
 262     # eliminate SSingle:EXT900
 263     if Word[30:31] =  0b10 and
 264        Word[6:29 ] != 0x000000 and
 265        Word[33:37] = 0b10001 and
 266        Word[62:63] = 0b00      return False
 267     # eliminate SVP64:EXT900
 268     if Word[30:31] =  0b10 and
 269        Word[33:37] = 0b10001 and
 270        Word[62:63] = 0b01      return False
 271     # all else needs further detailed decode
 272     return True
 273 ```
 274
 275 # alternative **no 32 encoding** 64-bit only (4) **current**
 276
 277 this idea gets even simpler. the 55-bit area is eliminated and may only be
 278 reintroduced by sacrificing parts of EXT200-263. however doing so **WILL** damage
 279 high-performance decode.
 280
 281 advantages:
 282
 283 * brutally simple length detection (multi-issue 1 clock cycle)
 284 * extremely easy SVP64 identification
 285 * extremely easy SVP64Single identification
 286
 287
 288 ```
 289 |0-5| 6-29   |30 31|32-37   | 38-663 | Description      |
 290 |---|--------|-----|--------|--------|------------------|
 291 |PO9| xxxx   | x x | 010001 |  ////  | RESERVED         |
 292 |PO9| xxxx   | x x | 000001 |  ////  | RESERVED         |
 293 |PO9| !ZERO  | 1 1 |  !PO9  |     xxxx        | SSingle:EXT200-263 |
 294 |PO9|  0000  | 1 1 |  !PO9  |     xxxx        | Scalar EXT200-263  |
 295 |PO9|  SVRM  | 1 0 |  !PO9  |     xxxx        | SVP64:EXT200-263   |
 296 |PO9|  0000  | 0 1 | Defined Word-instruction | 32-bit EXT300-363  |
 297 |PO9| !ZERO  | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
 298 |PO9|  SVRM  | 0 0 | Defined Word-instruction | SVP64:EXT000-063   |
 299 ```
 300 * bit 31 is "SVP64Single" if set else "SVP64"
 301 * bit 30 is EXT200-263 if set otherwise EXT000-063
 302
 303 (note: this is one of the original early PO9 Encodings,
 304  proposed in [[rfc/ls001]] and rejected at the time:
 305  with hindsight it should not have been)
 306
 307 **Identification**:
 308
 309 The following identification-criteria may be easily verified by taking
 310 a copy of the table above and striking out each line that fails each
 311 test.  Only EXT000-063 is not by a "process of elimination" (if ... return True)
 312
 313 **Length detection**: (critically-important to be short - 1 clock cycle)
 314
 315 ```
 316     if PO1 or PO9            return 64
 317     else                     return 32
 318 ```
 319
 320 **Scalar**: (includes EXT0xx, EXT2xx and EXT3xx):
 321
 322 |0-5| 6-29   |30 31|32-37   | 38-663 | Description      |
 323 |---|--------|-----|--------|--------|------------------|
 324 |PO9| xxxx   | x x | 010001 |  ////  | RESERVED         |
 325 |PO9| xxxx   | x x | 000001 |  ////  | RESERVED         |
 326 |PO9| !ZERO  | 1 1 |  !PO9  |     xxxx        | SSingle:EXT200-263 |
 327 |PO9|  0000  | 1 1 |  !PO9  |     xxxx        | Scalar EXT200-263  |
 328 |PO9|  SVRM  | 1 0 |  !PO9  |     xxxx        | SVP64:EXT200-263   |
 329 |PO9|  0000  | 0 1 | Defined Word-instruction | 32-bit EXT300-363  |
 330 |PO9| !ZERO  | 0 1 | Defined Word-instruction | SSingle:EXT000-063 |
 331 |PO9|  SVRM  | 0 0 | Defined Word-instruction | SVP64:EXT000-063   |
 332
 333 ```
 334     if PO1                    return True # EXT1xx is Scalar
 335     if not PO9                return True # anything not PO9 is EXT0xx
 336     if Word[6:29 ] = 0x000000 return True # EXT2xx and EXT3xx
 337     if Word[32:37] = 0b010001 return False # double-PO9 Reserved
 338     if Word[32:37] = 0b000001 return False # PO9-PO1 Reserved
 339     return False                          # all else is SVP64/SSingle
 340 ```
 341
 342 **EXT232-263:**
 343
 344 ```
 345     if not PO9                return False    # eliminate EXT0xx
 346     if Word[31] == 0b1        return False    # remaining is EXT2xx
 347     return True
 348 ```
 349
 350
 351
 352 **EXT000-063**: (includes Prefixed)
 353
 354 ```
 355     if PO1                     return False # or other reserved
 356     if not PO9                 return True  # prefixed needs more
 357     if Word[31]    =  0b0      return False # eliminate EXT2xx
 358     return True                             # remaining is EXT0xx
 359 ```
 360
 361 **SVP64**:
 362
 363 ```
 364     if not PO9                 return False # easy-elimination, first
 365     if Word[31]    =  0b1      return False # eliminate anything not SVP64
 366     return True    # all remaining are SVP64:EXT0xx/EXT2xx
 367 ```
 368
 369 **SVP64Single**:
 370
 371 ```
 372     if not PO9                 return False # easy-elimination, first
 373     if Word[31] =  0b0         return False # eliminate SVP64:*
 374     if Word[6:29 ] =  0x000000 return False # eliminate anything "Identity"
 375     return True    # everything left is SVP64Single
 376
 377 ```
 378
 379 **RESERVED**: (no need to pass for further detailed decode)
 380
 381 ```
 382     if not PO9                 return False # easy-elimination, first
 383     if Word[32:37] = 0b010001  return False # eliminate double-PO9
 384     if Word[32:37] = 0b000001  return False # eliminate PO9-PO1
 385     return True                # all else requires detailed decode
 386 ```