8 cp ${LIB_DIR}/DDRDLLA.v DDRDLLA.v
9 patch DDRDLLA.v
< DDRDLLA.
patch
10 iverilog
-Wall -g2012 -s simsoctb
-o simsoc \
11 src
/simsoctb.v .
/top.v dram_model
/ddr3.v \
12 ${LIB_DIR}/ECLKSYNCB.v
${LIB_DIR}/EHXPLLL.v \
13 ${LIB_DIR}/PUR.v
${LIB_DIR}/GSR.v \
14 ${LIB_DIR}/FD1S3AX.v ${LIB_DIR}/SGSR.v ${LIB_DIR}/ODDRX2F.v \
15 ${LIB_DIR}/ODDRX2DQA.v ${LIB_DIR}/DELAYF.v ${LIB_DIR}/BB.v \
16 ${LIB_DIR}/OB.v
${LIB_DIR}/IB.v \
17 ${LIB_DIR}/DQSBUFM.v
${LIB_DIR}/UDFDL5_UDP_X.v \
18 ${LIB_DIR}/TSHX2DQSA.v
${LIB_DIR}/TSHX2DQA.v \
19 ${LIB_DIR}/ODDRX2DQSB.v
${LIB_DIR}/IDDRX2DQA.v \
22 vvp
-n simsoc
-fst-speed