src/bigint_presentation_code/_tests/test_register_allocator.py

   1 import sys
   2 import unittest
   3
   4 from bigint_presentation_code.compiler_ir import (Fn, GenAsmState, OpKind,
   5                                                   SSAVal)
   6 from bigint_presentation_code.register_allocator import allocate_registers
   7 from bigint_presentation_code.register_allocator_test_util import GraphDumper
   8
   9
  10 class TestRegisterAllocator(unittest.TestCase):
  11     maxDiff = None
  12
  13     def make_add_fn(self):
  14         # type: () -> tuple[Fn, SSAVal]
  15         fn = Fn()
  16         op0 = fn.append_new_op(OpKind.FuncArgR3, name="arg")
  17         arg = op0.outputs[0]
  18         MAXVL = 32
  19         op1 = fn.append_new_op(OpKind.SetVLI, immediates=[MAXVL], name="vl")
  20         vl = op1.outputs[0]
  21         op2 = fn.append_new_op(
  22             OpKind.SvLd, input_vals=[arg, vl], immediates=[0], maxvl=MAXVL,
  23             name="ld")
  24         a = op2.outputs[0]
  25         op3 = fn.append_new_op(OpKind.SvLI, input_vals=[vl], immediates=[0],
  26                                maxvl=MAXVL, name="li")
  27         b = op3.outputs[0]
  28         op4 = fn.append_new_op(OpKind.SetCA, name="ca")
  29         ca = op4.outputs[0]
  30         op5 = fn.append_new_op(
  31             OpKind.SvAddE, input_vals=[a, b, ca, vl], maxvl=MAXVL, name="add")
  32         s = op5.outputs[0]
  33         _ = fn.append_new_op(OpKind.SvStd, input_vals=[s, arg, vl],
  34                              immediates=[0], maxvl=MAXVL, name="st")
  35         return fn, arg
  36
  37     def test_register_allocate(self):
  38         fn, _arg = self.make_add_fn()
  39         reg_assignments = allocate_registers(
  40             fn, debug_out=sys.stdout, dump_graph=GraphDumper(self))
  41
  42         self.assertEqual(
  43             repr(reg_assignments),
  44             "{<add.outputs[0]: <I64*32>>: "
  45             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  46             "<add.inp1.copy.outputs[0]: <I64*32>>: "
  47             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
  48             "<add.inp0.copy.outputs[0]: <I64*32>>: "
  49             "Loc(kind=LocKind.GPR, start=78, reg_len=32), "
  50             "<st.inp2.setvl.outputs[0]: <VL_MAXVL>>: "
  51             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  52             "<st.inp1.copy.outputs[0]: <I64>>: "
  53             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
  54             "<st.inp0.copy.outputs[0]: <I64*32>>: "
  55             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  56             "<st.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
  57             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  58             "<add.out0.copy.outputs[0]: <I64*32>>: "
  59             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  60             "<add.out0.setvl.outputs[0]: <VL_MAXVL>>: "
  61             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  62             "<ca.outputs[0]: <CA>>: "
  63             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
  64             "<add.outputs[1]: <CA>>: "
  65             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
  66             "<add.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
  67             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  68             "<add.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
  69             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  70             "<add.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
  71             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  72             "<li.out0.copy.outputs[0]: <I64*32>>: "
  73             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  74             "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: "
  75             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  76             "<li.outputs[0]: <I64*32>>: "
  77             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  78             "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
  79             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  80             "<ld.out0.copy.outputs[0]: <I64*32>>: "
  81             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
  82             "<ld.out0.setvl.outputs[0]: <VL_MAXVL>>: "
  83             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  84             "<ld.outputs[0]: <I64*32>>: "
  85             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
  86             "<ld.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
  87             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  88             "<ld.inp0.copy.outputs[0]: <I64>>: "
  89             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
  90             "<vl.outputs[0]: <VL_MAXVL>>: "
  91             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
  92             "<arg.out0.copy.outputs[0]: <I64>>: "
  93             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
  94             "<arg.outputs[0]: <I64>>: "
  95             "Loc(kind=LocKind.GPR, start=3, reg_len=1)}"
  96         )
  97
  98     def test_gen_asm(self):
  99         fn, _arg = self.make_add_fn()
 100         reg_assignments = allocate_registers(
 101             fn, debug_out=sys.stdout, dump_graph=GraphDumper(self))
 102
 103         self.assertEqual(
 104             repr(reg_assignments),
 105             "{"
 106             "<add.outputs[0]: <I64*32>>: "
 107             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 108             "<add.out0.copy.outputs[0]: <I64*32>>: "
 109             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 110             "<st.inp0.copy.outputs[0]: <I64*32>>: "
 111             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 112             "<add.inp1.copy.outputs[0]: <I64*32>>: "
 113             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 114             "<li.outputs[0]: <I64*32>>: "
 115             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 116             "<li.out0.copy.outputs[0]: <I64*32>>: "
 117             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 118             "<add.inp0.copy.outputs[0]: <I64*32>>: "
 119             "Loc(kind=LocKind.GPR, start=78, reg_len=32), "
 120             "<ld.out0.copy.outputs[0]: <I64*32>>: "
 121             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 122             "<ld.outputs[0]: <I64*32>>: "
 123             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 124             "<arg.outputs[0]: <I64>>: "
 125             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 126             "<arg.out0.copy.outputs[0]: <I64>>: "
 127             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 128             "<ld.inp0.copy.outputs[0]: <I64>>: "
 129             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 130             "<st.inp1.copy.outputs[0]: <I64>>: "
 131             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 132             "<st.inp2.setvl.outputs[0]: <VL_MAXVL>>: "
 133             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 134             "<st.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 135             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 136             "<add.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 137             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 138             "<ca.outputs[0]: <CA>>: "
 139             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 140             "<add.outputs[1]: <CA>>: "
 141             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 142             "<add.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 143             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 144             "<add.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 145             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 146             "<add.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 147             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 148             "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 149             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 150             "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 151             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 152             "<ld.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 153             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 154             "<ld.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 155             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 156             "<vl.outputs[0]: <VL_MAXVL>>: "
 157             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1)"
 158             "}"
 159         )
 160         state = GenAsmState(reg_assignments)
 161         fn.gen_asm(state)
 162         self.assertEqual(state.output, [
 163             'setvl 0, 0, 32, 0, 1, 1',
 164             'setvl 0, 0, 32, 0, 1, 1',
 165             'sv.ld *14, 0(3)',
 166             'setvl 0, 0, 32, 0, 1, 1',
 167             'setvl 0, 0, 32, 0, 1, 1',
 168             'sv.addi *46, 0, 0',
 169             'setvl 0, 0, 32, 0, 1, 1',
 170             'subfc 0, 0, 0',
 171             'setvl 0, 0, 32, 0, 1, 1',
 172             'sv.or *78, *14, *14',
 173             'setvl 0, 0, 32, 0, 1, 1',
 174             'setvl 0, 0, 32, 0, 1, 1',
 175             'sv.adde *14, *78, *46',
 176             'setvl 0, 0, 32, 0, 1, 1',
 177             'setvl 0, 0, 32, 0, 1, 1',
 178             'setvl 0, 0, 32, 0, 1, 1',
 179             'sv.std *14, 0(3)'
 180         ])
 181
 182     def test_register_allocate_graphs(self):
 183         fn, _arg = self.make_add_fn()
 184         graphs = {}  # type: dict[str, str]
 185
 186         graph_dumper = GraphDumper(self)
 187
 188         def dump_graph(name, dot):
 189             # type: (str, str) -> None
 190             self.assertNotIn(name, graphs, "duplicate graph name")
 191             graphs[name] = dot
 192             graph_dumper(name, dot)
 193         allocated = allocate_registers(
 194             fn, debug_out=sys.stdout, dump_graph=dump_graph)
 195         self.assertEqual(
 196             repr(allocated),
 197             "{"
 198             "<add.outputs[0]: <I64*32>>: "
 199             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 200             "<add.out0.copy.outputs[0]: <I64*32>>: "
 201             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 202             "<st.inp0.copy.outputs[0]: <I64*32>>: "
 203             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 204             "<add.inp1.copy.outputs[0]: <I64*32>>: "
 205             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 206             "<li.outputs[0]: <I64*32>>: "
 207             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 208             "<li.out0.copy.outputs[0]: <I64*32>>: "
 209             "Loc(kind=LocKind.GPR, start=46, reg_len=32), "
 210             "<add.inp0.copy.outputs[0]: <I64*32>>: "
 211             "Loc(kind=LocKind.GPR, start=78, reg_len=32), "
 212             "<ld.out0.copy.outputs[0]: <I64*32>>: "
 213             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 214             "<ld.outputs[0]: <I64*32>>: "
 215             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 216             "<arg.outputs[0]: <I64>>: "
 217             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 218             "<arg.out0.copy.outputs[0]: <I64>>: "
 219             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 220             "<ld.inp0.copy.outputs[0]: <I64>>: "
 221             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 222             "<st.inp1.copy.outputs[0]: <I64>>: "
 223             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 224             "<st.inp2.setvl.outputs[0]: <VL_MAXVL>>: "
 225             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 226             "<st.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 227             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 228             "<add.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 229             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 230             "<ca.outputs[0]: <CA>>: "
 231             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 232             "<add.outputs[1]: <CA>>: "
 233             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 234             "<add.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 235             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 236             "<add.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 237             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 238             "<add.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 239             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 240             "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 241             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 242             "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 243             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 244             "<ld.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 245             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 246             "<ld.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 247             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 248             "<vl.outputs[0]: <VL_MAXVL>>: "
 249             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1)"
 250             "}"
 251         )
 252         # FIXME: is_copy_related is not correct, it's missing a bunch of
 253         # edges (which aren't interference edges)
 254         self.assertEqual(graphs, {
 255             'initial': r"""graph {
 256     graph [pack = true]
 257     "0" [label = "<arg.outputs[0]: <I64>>: 0"]
 258     "1" [label = "<arg.out0.copy.outputs[0]: <I64>>: 0"]
 259     "2" [label = "<vl.outputs[0]: <VL_MAXVL>>: 0"]
 260     "3" [label = "<ld.inp0.copy.outputs[0]: <I64>>: 0"]
 261     "4" [label = "<ld.inp1.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 262     "5" [label = "<ld.outputs[0]: <I64*32>>: 0"]
 263     "6" [label = "<ld.out0.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 264     "7" [label = "<ld.out0.copy.outputs[0]: <I64*32>>: 0"]
 265     "8" [label = "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 266     "9" [label = "<li.outputs[0]: <I64*32>>: 0"]
 267     "10" [label = "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 268     "11" [label = "<li.out0.copy.outputs[0]: <I64*32>>: 0"]
 269     "12" [label = "<add.inp0.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 270     "13" [label = "<add.inp0.copy.outputs[0]: <I64*32>>: 0"]
 271     "14" [label = "<add.inp1.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 272     "15" [label = "<add.inp1.copy.outputs[0]: <I64*32>>: 0"]
 273     "16" [label = "<add.inp3.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 274     "17" [label = "<add.outputs[0]: <I64*32>>: 0"]
 275     "18" [label = "<ca.outputs[0]: <CA>>: 0\n<add.outputs[1]: <CA>>: 0"]
 276     "19" [label = "<add.out0.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 277     "20" [label = "<add.out0.copy.outputs[0]: <I64*32>>: 0"]
 278     "21" [label = "<st.inp0.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 279     "22" [label = "<st.inp0.copy.outputs[0]: <I64*32>>: 0"]
 280     "23" [label = "<st.inp1.copy.outputs[0]: <I64>>: 0"]
 281     "24" [label = "<st.inp2.setvl.outputs[0]: <VL_MAXVL>>: 0"]
 282     "0" -- "1" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 283     "0" -- "3" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 284     "0" -- "23" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 285     "1" -- "3" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 286     "1" -- "3" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 287     "1" -- "5" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 288     "1" -- "7" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 289     "1" -- "9" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 290     "1" -- "11" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 291     "1" -- "13" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 292     "1" -- "15" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 293     "1" -- "17" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 294     "1" -- "20" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 295     "1" -- "22" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 296     "1" -- "23" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 297     "3" -- "5" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 298     "3" -- "23" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 299     "5" -- "7" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 300     "5" -- "13" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 301     "7" -- "9" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 302     "7" -- "11" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 303     "7" -- "13" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 304     "9" -- "11" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 305     "9" -- "15" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 306     "11" -- "13" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 307     "11" -- "15" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 308     "13" -- "15" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 309     "13" -- "17" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 310     "15" -- "17" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 311     "17" -- "20" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 312     "17" -- "22" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 313     "20" -- "22" [label = "copy related", color = "blue", style = "dashed", decorate = true]
 314     "22" -- "23" [label = "interferes", color = "darkred", style = "bold", decorate = true]
 315 }"""
 316         })
 317
 318     def test_register_allocate_spread(self):
 319         fn = Fn()
 320         maxvl = 32
 321         vl = fn.append_new_op(OpKind.SetVLI, immediates=[maxvl],
 322                               name="vl", maxvl=maxvl).outputs[0]
 323         li = fn.append_new_op(OpKind.SvLI, input_vals=[vl], immediates=[0],
 324                               name="li", maxvl=maxvl).outputs[0]
 325         spread = fn.append_new_op(OpKind.Spread, input_vals=[li, vl],
 326                                   name="spread", maxvl=maxvl).outputs
 327         _concat = fn.append_new_op(
 328             OpKind.Concat, input_vals=[*spread[::-1], vl],
 329             name="concat", maxvl=maxvl)
 330         reg_assignments = allocate_registers(
 331             fn, debug_out=sys.stdout, dump_graph=GraphDumper(self))
 332
 333         self.assertEqual(
 334             repr(reg_assignments),
 335             "{"
 336             "<spread.out31.copy.outputs[0]: <I64>>: "
 337             "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
 338             "<concat.out0.copy.outputs[0]: <I64*32>>: "
 339             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 340             "<li.outputs[0]: <I64*32>>: "
 341             "Loc(kind=LocKind.GPR, start=45, reg_len=32), "
 342             "<li.out0.copy.outputs[0]: <I64*32>>: "
 343             "Loc(kind=LocKind.GPR, start=45, reg_len=32), "
 344             "<spread.inp0.copy.outputs[0]: <I64*32>>: "
 345             "Loc(kind=LocKind.GPR, start=45, reg_len=32), "
 346             "<spread.outputs[0]: <I64>>: "
 347             "Loc(kind=LocKind.GPR, start=45, reg_len=1), "
 348             "<spread.outputs[1]: <I64>>: "
 349             "Loc(kind=LocKind.GPR, start=46, reg_len=1), "
 350             "<spread.outputs[2]: <I64>>: "
 351             "Loc(kind=LocKind.GPR, start=47, reg_len=1), "
 352             "<spread.outputs[3]: <I64>>: "
 353             "Loc(kind=LocKind.GPR, start=48, reg_len=1), "
 354             "<spread.outputs[4]: <I64>>: "
 355             "Loc(kind=LocKind.GPR, start=49, reg_len=1), "
 356             "<spread.outputs[5]: <I64>>: "
 357             "Loc(kind=LocKind.GPR, start=50, reg_len=1), "
 358             "<spread.outputs[6]: <I64>>: "
 359             "Loc(kind=LocKind.GPR, start=51, reg_len=1), "
 360             "<spread.outputs[7]: <I64>>: "
 361             "Loc(kind=LocKind.GPR, start=52, reg_len=1), "
 362             "<spread.outputs[8]: <I64>>: "
 363             "Loc(kind=LocKind.GPR, start=53, reg_len=1), "
 364             "<spread.outputs[9]: <I64>>: "
 365             "Loc(kind=LocKind.GPR, start=54, reg_len=1), "
 366             "<spread.outputs[10]: <I64>>: "
 367             "Loc(kind=LocKind.GPR, start=55, reg_len=1), "
 368             "<spread.outputs[11]: <I64>>: "
 369             "Loc(kind=LocKind.GPR, start=56, reg_len=1), "
 370             "<spread.outputs[12]: <I64>>: "
 371             "Loc(kind=LocKind.GPR, start=57, reg_len=1), "
 372             "<spread.outputs[13]: <I64>>: "
 373             "Loc(kind=LocKind.GPR, start=58, reg_len=1), "
 374             "<spread.outputs[14]: <I64>>: "
 375             "Loc(kind=LocKind.GPR, start=59, reg_len=1), "
 376             "<spread.outputs[15]: <I64>>: "
 377             "Loc(kind=LocKind.GPR, start=60, reg_len=1), "
 378             "<spread.outputs[16]: <I64>>: "
 379             "Loc(kind=LocKind.GPR, start=61, reg_len=1), "
 380             "<spread.outputs[17]: <I64>>: "
 381             "Loc(kind=LocKind.GPR, start=62, reg_len=1), "
 382             "<spread.outputs[18]: <I64>>: "
 383             "Loc(kind=LocKind.GPR, start=63, reg_len=1), "
 384             "<spread.outputs[19]: <I64>>: "
 385             "Loc(kind=LocKind.GPR, start=64, reg_len=1), "
 386             "<spread.outputs[20]: <I64>>: "
 387             "Loc(kind=LocKind.GPR, start=65, reg_len=1), "
 388             "<spread.outputs[21]: <I64>>: "
 389             "Loc(kind=LocKind.GPR, start=66, reg_len=1), "
 390             "<spread.outputs[22]: <I64>>: "
 391             "Loc(kind=LocKind.GPR, start=67, reg_len=1), "
 392             "<spread.outputs[23]: <I64>>: "
 393             "Loc(kind=LocKind.GPR, start=68, reg_len=1), "
 394             "<spread.outputs[24]: <I64>>: "
 395             "Loc(kind=LocKind.GPR, start=69, reg_len=1), "
 396             "<spread.outputs[25]: <I64>>: "
 397             "Loc(kind=LocKind.GPR, start=70, reg_len=1), "
 398             "<spread.outputs[26]: <I64>>: "
 399             "Loc(kind=LocKind.GPR, start=71, reg_len=1), "
 400             "<spread.outputs[27]: <I64>>: "
 401             "Loc(kind=LocKind.GPR, start=72, reg_len=1), "
 402             "<spread.outputs[28]: <I64>>: "
 403             "Loc(kind=LocKind.GPR, start=73, reg_len=1), "
 404             "<spread.outputs[29]: <I64>>: "
 405             "Loc(kind=LocKind.GPR, start=74, reg_len=1), "
 406             "<spread.outputs[30]: <I64>>: "
 407             "Loc(kind=LocKind.GPR, start=75, reg_len=1), "
 408             "<spread.outputs[31]: <I64>>: "
 409             "Loc(kind=LocKind.GPR, start=76, reg_len=1), "
 410             "<concat.inp0.copy.outputs[0]: <I64>>: "
 411             "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
 412             "<concat.inp1.copy.outputs[0]: <I64>>: "
 413             "Loc(kind=LocKind.GPR, start=15, reg_len=1), "
 414             "<concat.inp2.copy.outputs[0]: <I64>>: "
 415             "Loc(kind=LocKind.GPR, start=16, reg_len=1), "
 416             "<concat.inp3.copy.outputs[0]: <I64>>: "
 417             "Loc(kind=LocKind.GPR, start=17, reg_len=1), "
 418             "<concat.inp4.copy.outputs[0]: <I64>>: "
 419             "Loc(kind=LocKind.GPR, start=18, reg_len=1), "
 420             "<concat.inp5.copy.outputs[0]: <I64>>: "
 421             "Loc(kind=LocKind.GPR, start=19, reg_len=1), "
 422             "<concat.inp6.copy.outputs[0]: <I64>>: "
 423             "Loc(kind=LocKind.GPR, start=20, reg_len=1), "
 424             "<concat.inp7.copy.outputs[0]: <I64>>: "
 425             "Loc(kind=LocKind.GPR, start=21, reg_len=1), "
 426             "<concat.inp8.copy.outputs[0]: <I64>>: "
 427             "Loc(kind=LocKind.GPR, start=22, reg_len=1), "
 428             "<concat.inp9.copy.outputs[0]: <I64>>: "
 429             "Loc(kind=LocKind.GPR, start=23, reg_len=1), "
 430             "<concat.inp10.copy.outputs[0]: <I64>>: "
 431             "Loc(kind=LocKind.GPR, start=24, reg_len=1), "
 432             "<concat.inp11.copy.outputs[0]: <I64>>: "
 433             "Loc(kind=LocKind.GPR, start=25, reg_len=1), "
 434             "<concat.inp12.copy.outputs[0]: <I64>>: "
 435             "Loc(kind=LocKind.GPR, start=26, reg_len=1), "
 436             "<concat.inp13.copy.outputs[0]: <I64>>: "
 437             "Loc(kind=LocKind.GPR, start=27, reg_len=1), "
 438             "<concat.inp14.copy.outputs[0]: <I64>>: "
 439             "Loc(kind=LocKind.GPR, start=28, reg_len=1), "
 440             "<concat.inp15.copy.outputs[0]: <I64>>: "
 441             "Loc(kind=LocKind.GPR, start=29, reg_len=1), "
 442             "<concat.inp16.copy.outputs[0]: <I64>>: "
 443             "Loc(kind=LocKind.GPR, start=30, reg_len=1), "
 444             "<concat.inp17.copy.outputs[0]: <I64>>: "
 445             "Loc(kind=LocKind.GPR, start=31, reg_len=1), "
 446             "<concat.inp18.copy.outputs[0]: <I64>>: "
 447             "Loc(kind=LocKind.GPR, start=32, reg_len=1), "
 448             "<concat.inp19.copy.outputs[0]: <I64>>: "
 449             "Loc(kind=LocKind.GPR, start=33, reg_len=1), "
 450             "<concat.inp20.copy.outputs[0]: <I64>>: "
 451             "Loc(kind=LocKind.GPR, start=34, reg_len=1), "
 452             "<concat.inp21.copy.outputs[0]: <I64>>: "
 453             "Loc(kind=LocKind.GPR, start=35, reg_len=1), "
 454             "<concat.inp22.copy.outputs[0]: <I64>>: "
 455             "Loc(kind=LocKind.GPR, start=36, reg_len=1), "
 456             "<concat.inp23.copy.outputs[0]: <I64>>: "
 457             "Loc(kind=LocKind.GPR, start=37, reg_len=1), "
 458             "<concat.inp24.copy.outputs[0]: <I64>>: "
 459             "Loc(kind=LocKind.GPR, start=38, reg_len=1), "
 460             "<concat.inp25.copy.outputs[0]: <I64>>: "
 461             "Loc(kind=LocKind.GPR, start=39, reg_len=1), "
 462             "<concat.inp26.copy.outputs[0]: <I64>>: "
 463             "Loc(kind=LocKind.GPR, start=40, reg_len=1), "
 464             "<concat.inp27.copy.outputs[0]: <I64>>: "
 465             "Loc(kind=LocKind.GPR, start=41, reg_len=1), "
 466             "<concat.inp28.copy.outputs[0]: <I64>>: "
 467             "Loc(kind=LocKind.GPR, start=42, reg_len=1), "
 468             "<concat.inp29.copy.outputs[0]: <I64>>: "
 469             "Loc(kind=LocKind.GPR, start=43, reg_len=1), "
 470             "<concat.inp30.copy.outputs[0]: <I64>>: "
 471             "Loc(kind=LocKind.GPR, start=44, reg_len=1), "
 472             "<concat.inp31.copy.outputs[0]: <I64>>: "
 473             "Loc(kind=LocKind.GPR, start=45, reg_len=1), "
 474             "<concat.outputs[0]: <I64*32>>: "
 475             "Loc(kind=LocKind.GPR, start=14, reg_len=32), "
 476             "<spread.out30.copy.outputs[0]: <I64>>: "
 477             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 478             "<spread.out29.copy.outputs[0]: <I64>>: "
 479             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 480             "<spread.out28.copy.outputs[0]: <I64>>: "
 481             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 482             "<spread.out27.copy.outputs[0]: <I64>>: "
 483             "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
 484             "<spread.out26.copy.outputs[0]: <I64>>: "
 485             "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
 486             "<spread.out25.copy.outputs[0]: <I64>>: "
 487             "Loc(kind=LocKind.GPR, start=8, reg_len=1), "
 488             "<spread.out24.copy.outputs[0]: <I64>>: "
 489             "Loc(kind=LocKind.GPR, start=9, reg_len=1), "
 490             "<spread.out23.copy.outputs[0]: <I64>>: "
 491             "Loc(kind=LocKind.GPR, start=10, reg_len=1), "
 492             "<spread.out22.copy.outputs[0]: <I64>>: "
 493             "Loc(kind=LocKind.GPR, start=11, reg_len=1), "
 494             "<spread.out21.copy.outputs[0]: <I64>>: "
 495             "Loc(kind=LocKind.GPR, start=12, reg_len=1), "
 496             "<spread.out20.copy.outputs[0]: <I64>>: "
 497             "Loc(kind=LocKind.GPR, start=77, reg_len=1), "
 498             "<spread.out19.copy.outputs[0]: <I64>>: "
 499             "Loc(kind=LocKind.GPR, start=78, reg_len=1), "
 500             "<spread.out18.copy.outputs[0]: <I64>>: "
 501             "Loc(kind=LocKind.GPR, start=79, reg_len=1), "
 502             "<spread.out17.copy.outputs[0]: <I64>>: "
 503             "Loc(kind=LocKind.GPR, start=80, reg_len=1), "
 504             "<spread.out16.copy.outputs[0]: <I64>>: "
 505             "Loc(kind=LocKind.GPR, start=81, reg_len=1), "
 506             "<spread.out15.copy.outputs[0]: <I64>>: "
 507             "Loc(kind=LocKind.GPR, start=82, reg_len=1), "
 508             "<spread.out14.copy.outputs[0]: <I64>>: "
 509             "Loc(kind=LocKind.GPR, start=83, reg_len=1), "
 510             "<spread.out13.copy.outputs[0]: <I64>>: "
 511             "Loc(kind=LocKind.GPR, start=84, reg_len=1), "
 512             "<spread.out12.copy.outputs[0]: <I64>>: "
 513             "Loc(kind=LocKind.GPR, start=85, reg_len=1), "
 514             "<spread.out11.copy.outputs[0]: <I64>>: "
 515             "Loc(kind=LocKind.GPR, start=86, reg_len=1), "
 516             "<spread.out10.copy.outputs[0]: <I64>>: "
 517             "Loc(kind=LocKind.GPR, start=87, reg_len=1), "
 518             "<spread.out9.copy.outputs[0]: <I64>>: "
 519             "Loc(kind=LocKind.GPR, start=88, reg_len=1), "
 520             "<spread.out8.copy.outputs[0]: <I64>>: "
 521             "Loc(kind=LocKind.GPR, start=89, reg_len=1), "
 522             "<spread.out7.copy.outputs[0]: <I64>>: "
 523             "Loc(kind=LocKind.GPR, start=90, reg_len=1), "
 524             "<spread.out6.copy.outputs[0]: <I64>>: "
 525             "Loc(kind=LocKind.GPR, start=91, reg_len=1), "
 526             "<spread.out5.copy.outputs[0]: <I64>>: "
 527             "Loc(kind=LocKind.GPR, start=92, reg_len=1), "
 528             "<spread.out4.copy.outputs[0]: <I64>>: "
 529             "Loc(kind=LocKind.GPR, start=93, reg_len=1), "
 530             "<spread.out3.copy.outputs[0]: <I64>>: "
 531             "Loc(kind=LocKind.GPR, start=94, reg_len=1), "
 532             "<spread.out2.copy.outputs[0]: <I64>>: "
 533             "Loc(kind=LocKind.GPR, start=95, reg_len=1), "
 534             "<spread.out1.copy.outputs[0]: <I64>>: "
 535             "Loc(kind=LocKind.GPR, start=96, reg_len=1), "
 536             "<spread.out0.copy.outputs[0]: <I64>>: "
 537             "Loc(kind=LocKind.GPR, start=97, reg_len=1), "
 538             "<concat.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 539             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 540             "<concat.inp32.setvl.outputs[0]: <VL_MAXVL>>: "
 541             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 542             "<spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 543             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 544             "<spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 545             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 546             "<li.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 547             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 548             "<li.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 549             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 550             "<vl.outputs[0]: <VL_MAXVL>>: "
 551             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1)"
 552             "}"
 553         )
 554         state = GenAsmState(reg_assignments)
 555         fn.gen_asm(state)
 556         self.assertEqual(state.output, [
 557             'setvl 0, 0, 32, 0, 1, 1',
 558             'setvl 0, 0, 32, 0, 1, 1',
 559             'sv.addi *45, 0, 0',
 560             'setvl 0, 0, 32, 0, 1, 1',
 561             'setvl 0, 0, 32, 0, 1, 1',
 562             'setvl 0, 0, 32, 0, 1, 1',
 563             'or 97, 45, 45',
 564             'or 96, 46, 46',
 565             'or 95, 47, 47',
 566             'or 94, 48, 48',
 567             'or 93, 49, 49',
 568             'or 92, 50, 50',
 569             'or 91, 51, 51',
 570             'or 90, 52, 52',
 571             'or 89, 53, 53',
 572             'or 88, 54, 54',
 573             'or 87, 55, 55',
 574             'or 86, 56, 56',
 575             'or 85, 57, 57',
 576             'or 84, 58, 58',
 577             'or 83, 59, 59',
 578             'or 82, 60, 60',
 579             'or 81, 61, 61',
 580             'or 80, 62, 62',
 581             'or 79, 63, 63',
 582             'or 78, 64, 64',
 583             'or 77, 65, 65',
 584             'or 12, 66, 66',
 585             'or 11, 67, 67',
 586             'or 10, 68, 68',
 587             'or 9, 69, 69',
 588             'or 8, 70, 70',
 589             'or 7, 71, 71',
 590             'or 6, 72, 72',
 591             'or 5, 73, 73',
 592             'or 4, 74, 74',
 593             'or 3, 75, 75',
 594             'or 14, 76, 76',
 595             'or 15, 3, 3',
 596             'or 16, 4, 4',
 597             'or 17, 5, 5',
 598             'or 18, 6, 6',
 599             'or 19, 7, 7',
 600             'or 20, 8, 8',
 601             'or 21, 9, 9',
 602             'or 22, 10, 10',
 603             'or 23, 11, 11',
 604             'or 24, 12, 12',
 605             'or 25, 77, 77',
 606             'or 26, 78, 78',
 607             'or 27, 79, 79',
 608             'or 28, 80, 80',
 609             'or 29, 81, 81',
 610             'or 30, 82, 82',
 611             'or 31, 83, 83',
 612             'or 32, 84, 84',
 613             'or 33, 85, 85',
 614             'or 34, 86, 86',
 615             'or 35, 87, 87',
 616             'or 36, 88, 88',
 617             'or 37, 89, 89',
 618             'or 38, 90, 90',
 619             'or 39, 91, 91',
 620             'or 40, 92, 92',
 621             'or 41, 93, 93',
 622             'or 42, 94, 94',
 623             'or 43, 95, 95',
 624             'or 44, 96, 96',
 625             'or 45, 97, 97',
 626             'setvl 0, 0, 32, 0, 1, 1',
 627             'setvl 0, 0, 32, 0, 1, 1'
 628         ])
 629
 630
 631 if __name__ == "__main__":
 632     _ = unittest.main()