src/bigint_presentation_code/_tests/test_toom_cook.py

   1 import unittest
   2 from typing import Callable
   3
   4 from bigint_presentation_code.compiler_ir2 import (GPR_SIZE_IN_BYTES,
   5                                                    BaseSimState, Fn,
   6                                                    GenAsmState, OpKind,
   7                                                    PostRASimState,
   8                                                    PreRASimState)
   9 from bigint_presentation_code.register_allocator2 import allocate_registers
  10 from bigint_presentation_code.toom_cook import ToomCookInstance, simple_mul
  11
  12
  13 class SimpleMul192x192:
  14     def __init__(self):
  15         super().__init__()
  16         self.fn = fn = Fn()
  17         self.dest_offset = 0
  18         self.lhs_offset = 48 + self.dest_offset
  19         self.rhs_offset = 24 + self.lhs_offset
  20         self.ptr_in = fn.append_new_op(kind=OpKind.FuncArgR3,
  21                                        name="ptr_in").outputs[0]
  22         setvl3 = fn.append_new_op(kind=OpKind.SetVLI, immediates=[3],
  23                                   maxvl=3, name="setvl3")
  24         load_lhs = fn.append_new_op(
  25             kind=OpKind.SvLd, immediates=[self.lhs_offset],
  26             input_vals=[self.ptr_in, setvl3.outputs[0]],
  27             name="load_lhs", maxvl=3)
  28         load_rhs = fn.append_new_op(
  29             kind=OpKind.SvLd, immediates=[self.rhs_offset],
  30             input_vals=[self.ptr_in, setvl3.outputs[0]],
  31             name="load_rhs", maxvl=3)
  32         retval = simple_mul(fn, load_lhs.outputs[0], load_rhs.outputs[0])
  33         setvl6 = fn.append_new_op(kind=OpKind.SetVLI, immediates=[6],
  34                                   maxvl=6, name="setvl6")
  35         fn.append_new_op(
  36             kind=OpKind.SvStd,
  37             input_vals=[retval, self.ptr_in, setvl6.outputs[0]],
  38             immediates=[self.dest_offset], maxvl=6, name="store_dest")
  39
  40
  41 class TestToomCook(unittest.TestCase):
  42     maxDiff = None
  43
  44     def test_toom_2_repr(self):
  45         TOOM_2 = ToomCookInstance.make_toom_2()
  46         # print(repr(repr(TOOM_2)))
  47         self.assertEqual(
  48             repr(TOOM_2),
  49             "ToomCookInstance(lhs_part_count=2, rhs_part_count=2, "
  50             "eval_points=(0, 1, POINT_AT_INFINITY), "
  51             "lhs_eval_ops=("
  52             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
  53             "EvalOpAdd(lhs="
  54             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
  55             "rhs="
  56             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
  57             "poly=EvalOpPoly({0: Fraction(1, 1), 1: Fraction(1, 1)})), "
  58             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)}))),"
  59             " rhs_eval_ops=("
  60             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
  61             "EvalOpAdd(lhs="
  62             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
  63             "rhs="
  64             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
  65             "poly=EvalOpPoly({0: Fraction(1, 1), 1: Fraction(1, 1)})), "
  66             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)}))),"
  67             " prod_eval_ops=("
  68             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
  69             "EvalOpSub(lhs="
  70             "EvalOpSub(lhs="
  71             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
  72             "rhs="
  73             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
  74             "poly=EvalOpPoly({0: Fraction(-1, 1), 1: Fraction(1, 1)})), "
  75             "rhs="
  76             "EvalOpInput(lhs=2, rhs=0, poly=EvalOpPoly({2: Fraction(1, 1)})), "
  77             "poly=EvalOpPoly({"
  78             "0: Fraction(-1, 1), 1: Fraction(1, 1), 2: Fraction(-1, 1)})), "
  79             "EvalOpInput(lhs=2, rhs=0, poly=EvalOpPoly({2: Fraction(1, 1)}))))"
  80         )
  81
  82     def test_toom_2_5_repr(self):
  83         TOOM_2_5 = ToomCookInstance.make_toom_2_5()
  84         # print(repr(repr(TOOM_2_5)))
  85         self.assertEqual(
  86             repr(TOOM_2_5),
  87             "ToomCookInstance(lhs_part_count=3, rhs_part_count=2, "
  88             "eval_points=(0, 1, -1, POINT_AT_INFINITY), lhs_eval_ops=("
  89             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
  90             "EvalOpAdd(lhs="
  91             "EvalOpAdd(lhs="
  92             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
  93             "rhs=EvalOpInput(lhs=2, rhs=0, "
  94             "poly=EvalOpPoly({2: Fraction(1, 1)})), "
  95             "poly=EvalOpPoly({0: Fraction(1, 1), 2: Fraction(1, 1)})), "
  96             "rhs=EvalOpInput(lhs=1, rhs=0, "
  97             "poly=EvalOpPoly({1: Fraction(1, 1)})), "
  98             "poly=EvalOpPoly({"
  99             "0: Fraction(1, 1), 1: Fraction(1, 1), 2: Fraction(1, 1)})), "
 100             "EvalOpSub(lhs="
 101             "EvalOpAdd(lhs="
 102             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 103             "rhs=EvalOpInput(lhs=2, rhs=0, "
 104             "poly=EvalOpPoly({2: Fraction(1, 1)})), "
 105             "poly=EvalOpPoly({0: Fraction(1, 1), 2: Fraction(1, 1)})), "
 106             "rhs=EvalOpInput(lhs=1, rhs=0, "
 107             "poly=EvalOpPoly({1: Fraction(1, 1)})), poly=EvalOpPoly("
 108             "{0: Fraction(1, 1), 1: Fraction(-1, 1), 2: Fraction(1, 1)})), "
 109             "EvalOpInput(lhs=2, rhs=0, "
 110             "poly=EvalOpPoly({2: Fraction(1, 1)}))), rhs_eval_ops=("
 111             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 112             "EvalOpAdd(lhs=EvalOpInput(lhs=0, rhs=0, "
 113             "poly=EvalOpPoly({0: Fraction(1, 1)})), rhs="
 114             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 115             "poly=EvalOpPoly({0: Fraction(1, 1), 1: Fraction(1, 1)})), "
 116             "EvalOpSub(lhs="
 117             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 118             "rhs=EvalOpInput(lhs=1, rhs=0, "
 119             "poly=EvalOpPoly({1: Fraction(1, 1)})), "
 120             "poly=EvalOpPoly({0: Fraction(1, 1), 1: Fraction(-1, 1)})), "
 121             "EvalOpInput(lhs=1, rhs=0, "
 122             "poly=EvalOpPoly({1: Fraction(1, 1)}))), "
 123             "prod_eval_ops=("
 124             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 125             "EvalOpSub(lhs=EvalOpExactDiv(lhs=EvalOpSub(lhs="
 126             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 127             "rhs=EvalOpInput(lhs=2, rhs=0, "
 128             "poly=EvalOpPoly({2: Fraction(1, 1)})), "
 129             "poly=EvalOpPoly({1: Fraction(1, 1), 2: Fraction(-1, 1)})), "
 130             "rhs=2, "
 131             "poly=EvalOpPoly({1: Fraction(1, 2), 2: Fraction(-1, 2)})), rhs="
 132             "EvalOpInput(lhs=3, rhs=0, poly=EvalOpPoly({3: Fraction(1, 1)})), "
 133             "poly=EvalOpPoly("
 134             "{1: Fraction(1, 2), 2: Fraction(-1, 2), 3: Fraction(-1, 1)})), "
 135             "EvalOpSub(lhs=EvalOpExactDiv(lhs=EvalOpAdd(lhs="
 136             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 137             "rhs="
 138             "EvalOpInput(lhs=2, rhs=0, poly=EvalOpPoly({2: Fraction(1, 1)})), "
 139             "poly=EvalOpPoly({1: Fraction(1, 1), 2: Fraction(1, 1)})), rhs=2, "
 140             "poly=EvalOpPoly({1: Fraction(1, 2), 2: Fraction(1, 2)})), rhs="
 141             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 142             "poly=EvalOpPoly("
 143             "{0: Fraction(-1, 1), 1: Fraction(1, 2), 2: Fraction(1, 2)})), "
 144             "EvalOpInput(lhs=3, rhs=0, poly=EvalOpPoly({3: Fraction(1, 1)}))))"
 145         )
 146
 147     def test_reversed_toom_2_5_repr(self):
 148         TOOM_2_5 = ToomCookInstance.make_toom_2_5().reversed()
 149         # print(repr(repr(TOOM_2_5)))
 150         self.assertEqual(
 151             repr(TOOM_2_5),
 152             "ToomCookInstance(lhs_part_count=2, rhs_part_count=3, "
 153             "eval_points=(0, 1, -1, POINT_AT_INFINITY), lhs_eval_ops=("
 154             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 155             "EvalOpAdd(lhs="
 156             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 157             "rhs="
 158             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 159             "poly=EvalOpPoly({0: Fraction(1, 1), 1: Fraction(1, 1)})), "
 160             "EvalOpSub(lhs="
 161             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 162             "rhs="
 163             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 164             "poly=EvalOpPoly({0: Fraction(1, 1), 1: Fraction(-1, 1)})), "
 165             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)}))),"
 166             " rhs_eval_ops=("
 167             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 168             "EvalOpAdd(lhs=EvalOpAdd(lhs="
 169             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 170             "rhs="
 171             "EvalOpInput(lhs=2, rhs=0, poly=EvalOpPoly({2: Fraction(1, 1)})), "
 172             "poly=EvalOpPoly({0: Fraction(1, 1), 2: Fraction(1, 1)})), rhs="
 173             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 174             "poly=EvalOpPoly("
 175             "{0: Fraction(1, 1), 1: Fraction(1, 1), 2: Fraction(1, 1)})), "
 176             "EvalOpSub(lhs=EvalOpAdd(lhs="
 177             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 178             "rhs="
 179             "EvalOpInput(lhs=2, rhs=0, poly=EvalOpPoly({2: Fraction(1, 1)})), "
 180             "poly=EvalOpPoly({0: Fraction(1, 1), 2: Fraction(1, 1)})), rhs="
 181             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 182             "poly=EvalOpPoly("
 183             "{0: Fraction(1, 1), 1: Fraction(-1, 1), 2: Fraction(1, 1)})), "
 184             "EvalOpInput(lhs=2, rhs=0, poly=EvalOpPoly({2: Fraction(1, 1)}))),"
 185             " prod_eval_ops=("
 186             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 187             "EvalOpSub(lhs=EvalOpExactDiv(lhs=EvalOpSub(lhs="
 188             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 189             "rhs="
 190             "EvalOpInput(lhs=2, rhs=0, poly=EvalOpPoly({2: Fraction(1, 1)})), "
 191             "poly=EvalOpPoly({1: Fraction(1, 1), 2: Fraction(-1, 1)})), "
 192             "rhs=2, "
 193             "poly=EvalOpPoly({1: Fraction(1, 2), 2: Fraction(-1, 2)})), rhs="
 194             "EvalOpInput(lhs=3, rhs=0, poly=EvalOpPoly({3: Fraction(1, 1)})), "
 195             "poly=EvalOpPoly("
 196             "{1: Fraction(1, 2), 2: Fraction(-1, 2), 3: Fraction(-1, 1)})), "
 197             "EvalOpSub(lhs=EvalOpExactDiv(lhs=EvalOpAdd(lhs="
 198             "EvalOpInput(lhs=1, rhs=0, poly=EvalOpPoly({1: Fraction(1, 1)})), "
 199             "rhs="
 200             "EvalOpInput(lhs=2, rhs=0, poly=EvalOpPoly({2: Fraction(1, 1)})), "
 201             "poly=EvalOpPoly({1: Fraction(1, 1), 2: Fraction(1, 1)})), rhs=2, "
 202             "poly=EvalOpPoly({1: Fraction(1, 2), 2: Fraction(1, 2)})), rhs="
 203             "EvalOpInput(lhs=0, rhs=0, poly=EvalOpPoly({0: Fraction(1, 1)})), "
 204             "poly=EvalOpPoly("
 205             "{0: Fraction(-1, 1), 1: Fraction(1, 2), 2: Fraction(1, 2)})), "
 206             "EvalOpInput(lhs=3, rhs=0, poly=EvalOpPoly({3: Fraction(1, 1)}))))"
 207         )
 208
 209     def test_simple_mul_192x192_pre_ra_sim(self):
 210         def create_sim_state(code):
 211             # type: (SimpleMul192x192) -> BaseSimState
 212             return PreRASimState(ssa_vals={}, memory={})
 213         self.tst_simple_mul_192x192_sim(create_sim_state)
 214
 215     def test_simple_mul_192x192_post_ra_sim(self):
 216         def create_sim_state(code):
 217             # type: (SimpleMul192x192) -> BaseSimState
 218             ssa_val_to_loc_map = allocate_registers(code.fn)
 219             return PostRASimState(ssa_val_to_loc_map=ssa_val_to_loc_map,
 220                                   memory={}, loc_values={})
 221         self.tst_simple_mul_192x192_sim(create_sim_state)
 222
 223     def tst_simple_mul_192x192_sim(self, create_sim_state):
 224         # type: (Callable[[SimpleMul192x192], BaseSimState]) -> None
 225         # test multiplying:
 226         #   0x000191acb262e15b_4c6b5f2b19e1a53e_821a2342132c5b57
 227         # * 0x4a37c0567bcbab53_cf1f597598194ae6_208a49071aeec507
 228         # ==
 229         # int("0x00074736574206e_6f69746163696c70"
 230         #     "_69746c756d207469_622d3438333e2d32"
 231         #     "_3931783239312079_7261727469627261", base=0)
 232         # == int.from_bytes(b"arbitrary 192x192->384-bit multiplication test",
 233         #                   'little')
 234         code = SimpleMul192x192()
 235         state = create_sim_state(code)
 236         ptr_in = 0x100
 237         dest_ptr = ptr_in + code.dest_offset
 238         lhs_ptr = ptr_in + code.lhs_offset
 239         rhs_ptr = ptr_in + code.rhs_offset
 240         state[code.ptr_in] = ptr_in,
 241         state.store(lhs_ptr, 0x821a2342132c5b57)
 242         state.store(lhs_ptr + 8, 0x4c6b5f2b19e1a53e)
 243         state.store(lhs_ptr + 16, 0x000191acb262e15b)
 244         state.store(rhs_ptr, 0x208a49071aeec507)
 245         state.store(rhs_ptr + 8, 0xcf1f597598194ae6)
 246         state.store(rhs_ptr + 16, 0x4a37c0567bcbab53)
 247         code.fn.sim(state)
 248         expected_bytes = b"arbitrary 192x192->384-bit multiplication test"
 249         OUT_BYTE_COUNT = 6 * GPR_SIZE_IN_BYTES
 250         expected_bytes = expected_bytes.ljust(OUT_BYTE_COUNT, b'\0')
 251         out_bytes = bytes(
 252             state.load_byte(dest_ptr + i) for i in range(OUT_BYTE_COUNT))
 253         self.assertEqual(out_bytes, expected_bytes)
 254
 255     def test_simple_mul_192x192_ops(self):
 256         code = SimpleMul192x192()
 257         fn = code.fn
 258         self.assertEqual([repr(v) for v in fn.ops], [
 259             "Op(kind=OpKind.FuncArgR3, "
 260             "input_vals=[], "
 261             "input_uses=(), immediates=[], "
 262             "outputs=(<ptr_in.outputs[0]: <I64>>,), "
 263             "name='ptr_in')",
 264             "Op(kind=OpKind.SetVLI, "
 265             "input_vals=[], "
 266             "input_uses=(), immediates=[3], "
 267             "outputs=(<setvl3.outputs[0]: <VL_MAXVL>>,), "
 268             "name='setvl3')",
 269             "Op(kind=OpKind.SvLd, "
 270             "input_vals=[<ptr_in.outputs[0]: <I64>>, "
 271             "<setvl3.outputs[0]: <VL_MAXVL>>], "
 272             "input_uses=(<load_lhs.input_uses[0]: <I64>>, "
 273             "<load_lhs.input_uses[1]: <VL_MAXVL>>), immediates=[48], "
 274             "outputs=(<load_lhs.outputs[0]: <I64*3>>,), "
 275             "name='load_lhs')",
 276             "Op(kind=OpKind.SvLd, "
 277             "input_vals=[<ptr_in.outputs[0]: <I64>>, "
 278             "<setvl3.outputs[0]: <VL_MAXVL>>], "
 279             "input_uses=(<load_rhs.input_uses[0]: <I64>>, "
 280             "<load_rhs.input_uses[1]: <VL_MAXVL>>), immediates=[72], "
 281             "outputs=(<load_rhs.outputs[0]: <I64*3>>,), "
 282             "name='load_rhs')",
 283             "Op(kind=OpKind.SetVLI, "
 284             "input_vals=[], "
 285             "input_uses=(), immediates=[3], "
 286             "outputs=(<rhs_setvl.outputs[0]: <VL_MAXVL>>,), "
 287             "name='rhs_setvl')",
 288             "Op(kind=OpKind.Spread, "
 289             "input_vals=[<load_rhs.outputs[0]: <I64*3>>, "
 290             "<rhs_setvl.outputs[0]: <VL_MAXVL>>], "
 291             "input_uses=(<rhs_spread.input_uses[0]: <I64*3>>, "
 292             "<rhs_spread.input_uses[1]: <VL_MAXVL>>), immediates=[], "
 293             "outputs=(<rhs_spread.outputs[0]: <I64>>, "
 294             "<rhs_spread.outputs[1]: <I64>>, "
 295             "<rhs_spread.outputs[2]: <I64>>), "
 296             "name='rhs_spread')",
 297             "Op(kind=OpKind.SetVLI, "
 298             "input_vals=[], "
 299             "input_uses=(), immediates=[3], "
 300             "outputs=(<lhs_setvl.outputs[0]: <VL_MAXVL>>,), "
 301             "name='lhs_setvl')",
 302             "Op(kind=OpKind.LI, "
 303             "input_vals=[], "
 304             "input_uses=(), immediates=[0], "
 305             "outputs=(<zero.outputs[0]: <I64>>,), "
 306             "name='zero')",
 307             "Op(kind=OpKind.SvMAddEDU, "
 308             "input_vals=[<load_lhs.outputs[0]: <I64*3>>, "
 309             "<rhs_spread.outputs[0]: <I64>>, "
 310             "<zero.outputs[0]: <I64>>, "
 311             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 312             "input_uses=(<mul0.input_uses[0]: <I64*3>>, "
 313             "<mul0.input_uses[1]: <I64>>, "
 314             "<mul0.input_uses[2]: <I64>>, "
 315             "<mul0.input_uses[3]: <VL_MAXVL>>), immediates=[], "
 316             "outputs=(<mul0.outputs[0]: <I64*3>>, "
 317             "<mul0.outputs[1]: <I64>>), "
 318             "name='mul0')",
 319             "Op(kind=OpKind.Spread, "
 320             "input_vals=[<mul0.outputs[0]: <I64*3>>, "
 321             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 322             "input_uses=(<mul0_rt_spread.input_uses[0]: <I64*3>>, "
 323             "<mul0_rt_spread.input_uses[1]: <VL_MAXVL>>), immediates=[], "
 324             "outputs=(<mul0_rt_spread.outputs[0]: <I64>>, "
 325             "<mul0_rt_spread.outputs[1]: <I64>>, "
 326             "<mul0_rt_spread.outputs[2]: <I64>>), "
 327             "name='mul0_rt_spread')",
 328             "Op(kind=OpKind.SvMAddEDU, "
 329             "input_vals=[<load_lhs.outputs[0]: <I64*3>>, "
 330             "<rhs_spread.outputs[1]: <I64>>, "
 331             "<zero.outputs[0]: <I64>>, "
 332             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 333             "input_uses=(<mul1.input_uses[0]: <I64*3>>, "
 334             "<mul1.input_uses[1]: <I64>>, "
 335             "<mul1.input_uses[2]: <I64>>, "
 336             "<mul1.input_uses[3]: <VL_MAXVL>>), immediates=[], "
 337             "outputs=(<mul1.outputs[0]: <I64*3>>, "
 338             "<mul1.outputs[1]: <I64>>), "
 339             "name='mul1')",
 340             "Op(kind=OpKind.Concat, "
 341             "input_vals=[<mul0_rt_spread.outputs[1]: <I64>>, "
 342             "<mul0_rt_spread.outputs[2]: <I64>>, "
 343             "<mul0.outputs[1]: <I64>>, "
 344             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 345             "input_uses=(<add1_rb_concat.input_uses[0]: <I64>>, "
 346             "<add1_rb_concat.input_uses[1]: <I64>>, "
 347             "<add1_rb_concat.input_uses[2]: <I64>>, "
 348             "<add1_rb_concat.input_uses[3]: <VL_MAXVL>>), immediates=[], "
 349             "outputs=(<add1_rb_concat.outputs[0]: <I64*3>>,), "
 350             "name='add1_rb_concat')",
 351             "Op(kind=OpKind.ClearCA, "
 352             "input_vals=[], "
 353             "input_uses=(), immediates=[], "
 354             "outputs=(<clear_ca1.outputs[0]: <CA>>,), "
 355             "name='clear_ca1')",
 356             "Op(kind=OpKind.SvAddE, "
 357             "input_vals=[<mul1.outputs[0]: <I64*3>>, "
 358             "<add1_rb_concat.outputs[0]: <I64*3>>, "
 359             "<clear_ca1.outputs[0]: <CA>>, "
 360             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 361             "input_uses=(<add1.input_uses[0]: <I64*3>>, "
 362             "<add1.input_uses[1]: <I64*3>>, "
 363             "<add1.input_uses[2]: <CA>>, "
 364             "<add1.input_uses[3]: <VL_MAXVL>>), immediates=[], "
 365             "outputs=(<add1.outputs[0]: <I64*3>>, "
 366             "<add1.outputs[1]: <CA>>), "
 367             "name='add1')",
 368             "Op(kind=OpKind.Spread, "
 369             "input_vals=[<add1.outputs[0]: <I64*3>>, "
 370             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 371             "input_uses=(<add1_rt_spread.input_uses[0]: <I64*3>>, "
 372             "<add1_rt_spread.input_uses[1]: <VL_MAXVL>>), immediates=[], "
 373             "outputs=(<add1_rt_spread.outputs[0]: <I64>>, "
 374             "<add1_rt_spread.outputs[1]: <I64>>, "
 375             "<add1_rt_spread.outputs[2]: <I64>>), "
 376             "name='add1_rt_spread')",
 377             "Op(kind=OpKind.AddZE, "
 378             "input_vals=[<mul1.outputs[1]: <I64>>, "
 379             "<add1.outputs[1]: <CA>>], "
 380             "input_uses=(<add_hi1.input_uses[0]: <I64>>, "
 381             "<add_hi1.input_uses[1]: <CA>>), immediates=[], "
 382             "outputs=(<add_hi1.outputs[0]: <I64>>, "
 383             "<add_hi1.outputs[1]: <CA>>), "
 384             "name='add_hi1')",
 385             "Op(kind=OpKind.SvMAddEDU, "
 386             "input_vals=[<load_lhs.outputs[0]: <I64*3>>, "
 387             "<rhs_spread.outputs[2]: <I64>>, "
 388             "<zero.outputs[0]: <I64>>, "
 389             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 390             "input_uses=(<mul2.input_uses[0]: <I64*3>>, "
 391             "<mul2.input_uses[1]: <I64>>, "
 392             "<mul2.input_uses[2]: <I64>>, "
 393             "<mul2.input_uses[3]: <VL_MAXVL>>), immediates=[], "
 394             "outputs=(<mul2.outputs[0]: <I64*3>>, "
 395             "<mul2.outputs[1]: <I64>>), "
 396             "name='mul2')",
 397             "Op(kind=OpKind.Concat, "
 398             "input_vals=[<add1_rt_spread.outputs[1]: <I64>>, "
 399             "<add1_rt_spread.outputs[2]: <I64>>, "
 400             "<add_hi1.outputs[0]: <I64>>, "
 401             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 402             "input_uses=(<add2_rb_concat.input_uses[0]: <I64>>, "
 403             "<add2_rb_concat.input_uses[1]: <I64>>, "
 404             "<add2_rb_concat.input_uses[2]: <I64>>, "
 405             "<add2_rb_concat.input_uses[3]: <VL_MAXVL>>), immediates=[], "
 406             "outputs=(<add2_rb_concat.outputs[0]: <I64*3>>,), "
 407             "name='add2_rb_concat')",
 408             "Op(kind=OpKind.ClearCA, "
 409             "input_vals=[], "
 410             "input_uses=(), immediates=[], "
 411             "outputs=(<clear_ca2.outputs[0]: <CA>>,), "
 412             "name='clear_ca2')",
 413             "Op(kind=OpKind.SvAddE, "
 414             "input_vals=[<mul2.outputs[0]: <I64*3>>, "
 415             "<add2_rb_concat.outputs[0]: <I64*3>>, "
 416             "<clear_ca2.outputs[0]: <CA>>, "
 417             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 418             "input_uses=(<add2.input_uses[0]: <I64*3>>, "
 419             "<add2.input_uses[1]: <I64*3>>, "
 420             "<add2.input_uses[2]: <CA>>, "
 421             "<add2.input_uses[3]: <VL_MAXVL>>), immediates=[], "
 422             "outputs=(<add2.outputs[0]: <I64*3>>, "
 423             "<add2.outputs[1]: <CA>>), "
 424             "name='add2')",
 425             "Op(kind=OpKind.Spread, "
 426             "input_vals=[<add2.outputs[0]: <I64*3>>, "
 427             "<lhs_setvl.outputs[0]: <VL_MAXVL>>], "
 428             "input_uses=(<add2_rt_spread.input_uses[0]: <I64*3>>, "
 429             "<add2_rt_spread.input_uses[1]: <VL_MAXVL>>), immediates=[], "
 430             "outputs=(<add2_rt_spread.outputs[0]: <I64>>, "
 431             "<add2_rt_spread.outputs[1]: <I64>>, "
 432             "<add2_rt_spread.outputs[2]: <I64>>), "
 433             "name='add2_rt_spread')",
 434             "Op(kind=OpKind.AddZE, "
 435             "input_vals=[<mul2.outputs[1]: <I64>>, "
 436             "<add2.outputs[1]: <CA>>], "
 437             "input_uses=(<add_hi2.input_uses[0]: <I64>>, "
 438             "<add_hi2.input_uses[1]: <CA>>), immediates=[], "
 439             "outputs=(<add_hi2.outputs[0]: <I64>>, "
 440             "<add_hi2.outputs[1]: <CA>>), "
 441             "name='add_hi2')",
 442             "Op(kind=OpKind.SetVLI, "
 443             "input_vals=[], "
 444             "input_uses=(), immediates=[6], "
 445             "outputs=(<retval_setvl.outputs[0]: <VL_MAXVL>>,), "
 446             "name='retval_setvl')",
 447             "Op(kind=OpKind.Concat, "
 448             "input_vals=[<mul0_rt_spread.outputs[0]: <I64>>, "
 449             "<add1_rt_spread.outputs[0]: <I64>>, "
 450             "<add2_rt_spread.outputs[0]: <I64>>, "
 451             "<add2_rt_spread.outputs[1]: <I64>>, "
 452             "<add2_rt_spread.outputs[2]: <I64>>, "
 453             "<add_hi2.outputs[0]: <I64>>, "
 454             "<retval_setvl.outputs[0]: <VL_MAXVL>>], "
 455             "input_uses=(<concat_retval.input_uses[0]: <I64>>, "
 456             "<concat_retval.input_uses[1]: <I64>>, "
 457             "<concat_retval.input_uses[2]: <I64>>, "
 458             "<concat_retval.input_uses[3]: <I64>>, "
 459             "<concat_retval.input_uses[4]: <I64>>, "
 460             "<concat_retval.input_uses[5]: <I64>>, "
 461             "<concat_retval.input_uses[6]: <VL_MAXVL>>), immediates=[], "
 462             "outputs=(<concat_retval.outputs[0]: <I64*6>>,), "
 463             "name='concat_retval')",
 464             "Op(kind=OpKind.SetVLI, "
 465             "input_vals=[], "
 466             "input_uses=(), immediates=[6], "
 467             "outputs=(<setvl6.outputs[0]: <VL_MAXVL>>,), "
 468             "name='setvl6')",
 469             "Op(kind=OpKind.SvStd, "
 470             "input_vals=[<concat_retval.outputs[0]: <I64*6>>, "
 471             "<ptr_in.outputs[0]: <I64>>, "
 472             "<setvl6.outputs[0]: <VL_MAXVL>>], "
 473             "input_uses=(<store_dest.input_uses[0]: <I64*6>>, "
 474             "<store_dest.input_uses[1]: <I64>>, "
 475             "<store_dest.input_uses[2]: <VL_MAXVL>>), immediates=[0], "
 476             "outputs=(), "
 477             "name='store_dest')",
 478         ])
 479
 480     def test_simple_mul_192x192_reg_alloc(self):
 481         code = SimpleMul192x192()
 482         fn = code.fn
 483         assigned_registers = allocate_registers(fn)
 484         self.assertEqual(
 485             repr(assigned_registers), "{"
 486             "<store_dest.inp2.setvl.outputs[0]: <VL_MAXVL>>: "
 487             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 488             "<store_dest.inp1.copy.outputs[0]: <I64>>: "
 489             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 490             "<store_dest.inp0.copy.outputs[0]: <I64*6>>: "
 491             "Loc(kind=LocKind.GPR, start=4, reg_len=6), "
 492             "<store_dest.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 493             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 494             "<setvl6.outputs[0]: <VL_MAXVL>>: "
 495             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 496             "<concat_retval.out0.copy.outputs[0]: <I64*6>>: "
 497             "Loc(kind=LocKind.GPR, start=3, reg_len=6), "
 498             "<concat_retval.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 499             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 500             "<concat_retval.outputs[0]: <I64*6>>: "
 501             "Loc(kind=LocKind.GPR, start=3, reg_len=6), "
 502             "<concat_retval.inp0.copy.outputs[0]: <I64>>: "
 503             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 504             "<concat_retval.inp1.copy.outputs[0]: <I64>>: "
 505             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 506             "<concat_retval.inp2.copy.outputs[0]: <I64>>: "
 507             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 508             "<concat_retval.inp3.copy.outputs[0]: <I64>>: "
 509             "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
 510             "<concat_retval.inp4.copy.outputs[0]: <I64>>: "
 511             "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
 512             "<concat_retval.inp5.copy.outputs[0]: <I64>>: "
 513             "Loc(kind=LocKind.GPR, start=8, reg_len=1), "
 514             "<concat_retval.inp6.setvl.outputs[0]: <VL_MAXVL>>: "
 515             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 516             "<retval_setvl.outputs[0]: <VL_MAXVL>>: "
 517             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 518             "<add_hi2.out0.copy.outputs[0]: <I64>>: "
 519             "Loc(kind=LocKind.GPR, start=9, reg_len=1), "
 520             "<clear_ca2.outputs[0]: <CA>>: "
 521             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 522             "<add2.outputs[1]: <CA>>: "
 523             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 524             "<add_hi2.outputs[1]: <CA>>: "
 525             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 526             "<add_hi2.outputs[0]: <I64>>: "
 527             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 528             "<add_hi2.inp0.copy.outputs[0]: <I64>>: "
 529             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 530             "<add2_rt_spread.out2.copy.outputs[0]: <I64>>: "
 531             "Loc(kind=LocKind.GPR, start=10, reg_len=1), "
 532             "<add2_rt_spread.out1.copy.outputs[0]: <I64>>: "
 533             "Loc(kind=LocKind.GPR, start=11, reg_len=1), "
 534             "<add2_rt_spread.out0.copy.outputs[0]: <I64>>: "
 535             "Loc(kind=LocKind.GPR, start=12, reg_len=1), "
 536             "<add2_rt_spread.outputs[0]: <I64>>: "
 537             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 538             "<add2_rt_spread.outputs[1]: <I64>>: "
 539             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 540             "<add2_rt_spread.outputs[2]: <I64>>: "
 541             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 542             "<add2_rt_spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 543             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 544             "<add2_rt_spread.inp0.copy.outputs[0]: <I64*3>>: "
 545             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 546             "<add2_rt_spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 547             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 548             "<add2.out0.copy.outputs[0]: <I64*3>>: "
 549             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 550             "<add2.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 551             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 552             "<add2.outputs[0]: <I64*3>>: "
 553             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 554             "<add2.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 555             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 556             "<add2.inp1.copy.outputs[0]: <I64*3>>: "
 557             "Loc(kind=LocKind.GPR, start=6, reg_len=3), "
 558             "<add2.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 559             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 560             "<add2.inp0.copy.outputs[0]: <I64*3>>: "
 561             "Loc(kind=LocKind.GPR, start=9, reg_len=3), "
 562             "<add2.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 563             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 564             "<add2_rb_concat.out0.copy.outputs[0]: <I64*3>>: "
 565             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 566             "<add2_rb_concat.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 567             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 568             "<add2_rb_concat.outputs[0]: <I64*3>>: "
 569             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 570             "<add2_rb_concat.inp0.copy.outputs[0]: <I64>>: "
 571             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 572             "<add2_rb_concat.inp1.copy.outputs[0]: <I64>>: "
 573             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 574             "<add2_rb_concat.inp2.copy.outputs[0]: <I64>>: "
 575             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 576             "<add2_rb_concat.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 577             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 578             "<mul2.out1.copy.outputs[0]: <I64>>: "
 579             "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
 580             "<mul2.out0.copy.outputs[0]: <I64*3>>: "
 581             "Loc(kind=LocKind.GPR, start=6, reg_len=3), "
 582             "<mul2.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 583             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 584             "<mul2.inp2.copy.outputs[0]: <I64>>: "
 585             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 586             "<mul2.outputs[1]: <I64>>: "
 587             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 588             "<mul2.outputs[0]: <I64*3>>: "
 589             "Loc(kind=LocKind.GPR, start=4, reg_len=3), "
 590             "<mul2.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 591             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 592             "<mul2.inp1.copy.outputs[0]: <I64>>: "
 593             "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
 594             "<mul2.inp0.copy.outputs[0]: <I64*3>>: "
 595             "Loc(kind=LocKind.GPR, start=8, reg_len=3), "
 596             "<mul2.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 597             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 598             "<add_hi1.out0.copy.outputs[0]: <I64>>: "
 599             "Loc(kind=LocKind.GPR, start=11, reg_len=1), "
 600             "<clear_ca1.outputs[0]: <CA>>: "
 601             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 602             "<add1.outputs[1]: <CA>>: "
 603             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 604             "<add_hi1.outputs[1]: <CA>>: "
 605             "Loc(kind=LocKind.CA, start=0, reg_len=1), "
 606             "<add_hi1.outputs[0]: <I64>>: "
 607             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 608             "<add_hi1.inp0.copy.outputs[0]: <I64>>: "
 609             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 610             "<add1_rt_spread.out2.copy.outputs[0]: <I64>>: "
 611             "Loc(kind=LocKind.GPR, start=12, reg_len=1), "
 612             "<add1_rt_spread.out1.copy.outputs[0]: <I64>>: "
 613             "Loc(kind=LocKind.GPR, start=15, reg_len=1), "
 614             "<add1_rt_spread.out0.copy.outputs[0]: <I64>>: "
 615             "Loc(kind=LocKind.GPR, start=16, reg_len=1), "
 616             "<add1_rt_spread.outputs[0]: <I64>>: "
 617             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 618             "<add1_rt_spread.outputs[1]: <I64>>: "
 619             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 620             "<add1_rt_spread.outputs[2]: <I64>>: "
 621             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 622             "<add1_rt_spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 623             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 624             "<add1_rt_spread.inp0.copy.outputs[0]: <I64*3>>: "
 625             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 626             "<add1_rt_spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 627             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 628             "<add1.out0.copy.outputs[0]: <I64*3>>: "
 629             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 630             "<add1.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 631             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 632             "<add1.outputs[0]: <I64*3>>: "
 633             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 634             "<add1.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 635             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 636             "<add1.inp1.copy.outputs[0]: <I64*3>>: "
 637             "Loc(kind=LocKind.GPR, start=6, reg_len=3), "
 638             "<add1.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 639             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 640             "<add1.inp0.copy.outputs[0]: <I64*3>>: "
 641             "Loc(kind=LocKind.GPR, start=9, reg_len=3), "
 642             "<add1.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 643             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 644             "<add1_rb_concat.out0.copy.outputs[0]: <I64*3>>: "
 645             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 646             "<add1_rb_concat.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 647             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 648             "<add1_rb_concat.outputs[0]: <I64*3>>: "
 649             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 650             "<add1_rb_concat.inp0.copy.outputs[0]: <I64>>: "
 651             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 652             "<add1_rb_concat.inp1.copy.outputs[0]: <I64>>: "
 653             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 654             "<add1_rb_concat.inp2.copy.outputs[0]: <I64>>: "
 655             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 656             "<add1_rb_concat.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 657             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 658             "<mul1.out1.copy.outputs[0]: <I64>>: "
 659             "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
 660             "<mul1.out0.copy.outputs[0]: <I64*3>>: "
 661             "Loc(kind=LocKind.GPR, start=6, reg_len=3), "
 662             "<mul1.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 663             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 664             "<mul1.inp2.copy.outputs[0]: <I64>>: "
 665             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 666             "<mul1.outputs[1]: <I64>>: "
 667             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 668             "<mul1.outputs[0]: <I64*3>>: "
 669             "Loc(kind=LocKind.GPR, start=4, reg_len=3), "
 670             "<mul1.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 671             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 672             "<mul1.inp1.copy.outputs[0]: <I64>>: "
 673             "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
 674             "<mul1.inp0.copy.outputs[0]: <I64*3>>: "
 675             "Loc(kind=LocKind.GPR, start=8, reg_len=3), "
 676             "<mul1.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 677             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 678             "<mul0_rt_spread.out2.copy.outputs[0]: <I64>>: "
 679             "Loc(kind=LocKind.GPR, start=11, reg_len=1), "
 680             "<mul0_rt_spread.out1.copy.outputs[0]: <I64>>: "
 681             "Loc(kind=LocKind.GPR, start=12, reg_len=1), "
 682             "<mul0_rt_spread.out0.copy.outputs[0]: <I64>>: "
 683             "Loc(kind=LocKind.GPR, start=17, reg_len=1), "
 684             "<mul0_rt_spread.outputs[0]: <I64>>: "
 685             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 686             "<mul0_rt_spread.outputs[1]: <I64>>: "
 687             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 688             "<mul0_rt_spread.outputs[2]: <I64>>: "
 689             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 690             "<mul0_rt_spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 691             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 692             "<mul0_rt_spread.inp0.copy.outputs[0]: <I64*3>>: "
 693             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 694             "<mul0_rt_spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 695             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 696             "<mul0.out1.copy.outputs[0]: <I64>>: "
 697             "Loc(kind=LocKind.GPR, start=15, reg_len=1), "
 698             "<mul0.out0.copy.outputs[0]: <I64*3>>: "
 699             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 700             "<mul0.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 701             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 702             "<mul0.inp2.copy.outputs[0]: <I64>>: "
 703             "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
 704             "<mul0.outputs[1]: <I64>>: "
 705             "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
 706             "<mul0.outputs[0]: <I64*3>>: "
 707             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 708             "<mul0.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
 709             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 710             "<mul0.inp1.copy.outputs[0]: <I64>>: "
 711             "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
 712             "<mul0.inp0.copy.outputs[0]: <I64*3>>: "
 713             "Loc(kind=LocKind.GPR, start=8, reg_len=3), "
 714             "<mul0.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 715             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 716             "<zero.out0.copy.outputs[0]: <I64>>: "
 717             "Loc(kind=LocKind.GPR, start=18, reg_len=1), "
 718             "<zero.outputs[0]: <I64>>: "
 719             "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
 720             "<lhs_setvl.outputs[0]: <VL_MAXVL>>: "
 721             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 722             "<rhs_spread.out2.copy.outputs[0]: <I64>>: "
 723             "Loc(kind=LocKind.GPR, start=19, reg_len=1), "
 724             "<rhs_spread.out1.copy.outputs[0]: <I64>>: "
 725             "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
 726             "<rhs_spread.out0.copy.outputs[0]: <I64>>: "
 727             "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
 728             "<rhs_spread.outputs[0]: <I64>>: "
 729             "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
 730             "<rhs_spread.outputs[1]: <I64>>: "
 731             "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
 732             "<rhs_spread.outputs[2]: <I64>>: "
 733             "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
 734             "<rhs_spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 735             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 736             "<rhs_spread.inp0.copy.outputs[0]: <I64*3>>: "
 737             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 738             "<rhs_spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
 739             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 740             "<rhs_setvl.outputs[0]: <VL_MAXVL>>: "
 741             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 742             "<load_rhs.out0.copy.outputs[0]: <I64*3>>: "
 743             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 744             "<load_rhs.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 745             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 746             "<load_rhs.outputs[0]: <I64*3>>: "
 747             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 748             "<load_rhs.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 749             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 750             "<load_rhs.inp0.copy.outputs[0]: <I64>>: "
 751             "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
 752             "<load_lhs.out0.copy.outputs[0]: <I64*3>>: "
 753             "Loc(kind=LocKind.GPR, start=20, reg_len=3), "
 754             "<load_lhs.out0.setvl.outputs[0]: <VL_MAXVL>>: "
 755             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 756             "<load_lhs.outputs[0]: <I64*3>>: "
 757             "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
 758             "<load_lhs.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
 759             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 760             "<load_lhs.inp0.copy.outputs[0]: <I64>>: "
 761             "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
 762             "<setvl3.outputs[0]: <VL_MAXVL>>: "
 763             "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
 764             "<ptr_in.out0.copy.outputs[0]: <I64>>: "
 765             "Loc(kind=LocKind.GPR, start=23, reg_len=1), "
 766             "<ptr_in.outputs[0]: <I64>>: "
 767             "Loc(kind=LocKind.GPR, start=3, reg_len=1)"
 768             "}")
 769
 770     def test_simple_mul_192x192_asm(self):
 771         code = SimpleMul192x192()
 772         fn = code.fn
 773         assigned_registers = allocate_registers(fn)
 774         gen_asm_state = GenAsmState(assigned_registers)
 775         fn.gen_asm(gen_asm_state)
 776         self.assertEqual(gen_asm_state.output, [
 777             'or 23, 3, 3',
 778             'setvl 0, 0, 3, 0, 1, 1',
 779             'or 6, 23, 23',
 780             'setvl 0, 0, 3, 0, 1, 1',
 781             'sv.ld *3, 48(6)',
 782             'setvl 0, 0, 3, 0, 1, 1',
 783             'sv.or *20, *3, *3',
 784             'or 6, 23, 23',
 785             'setvl 0, 0, 3, 0, 1, 1',
 786             'sv.ld *3, 72(6)',
 787             'setvl 0, 0, 3, 0, 1, 1',
 788             'setvl 0, 0, 3, 0, 1, 1',
 789             'setvl 0, 0, 3, 0, 1, 1',
 790             'setvl 0, 0, 3, 0, 1, 1',
 791             'sv.or/mrr *5, *3, *3',
 792             'or 4, 5, 5',
 793             'or 14, 6, 6',
 794             'or 19, 7, 7',
 795             'setvl 0, 0, 3, 0, 1, 1',
 796             'addi 3, 0, 0',
 797             'or 18, 3, 3',
 798             'setvl 0, 0, 3, 0, 1, 1',
 799             'sv.or *8, *20, *20',
 800             'or 7, 4, 4',
 801             'or 6, 18, 18',
 802             'setvl 0, 0, 3, 0, 1, 1',
 803             'sv.maddedu *3, *8, 7, 6',
 804             'setvl 0, 0, 3, 0, 1, 1',
 805             'or 15, 6, 6',
 806             'setvl 0, 0, 3, 0, 1, 1',
 807             'setvl 0, 0, 3, 0, 1, 1',
 808             'or 17, 3, 3',
 809             'or 12, 4, 4',
 810             'or 11, 5, 5',
 811             'setvl 0, 0, 3, 0, 1, 1',
 812             'sv.or *8, *20, *20',
 813             'or 7, 14, 14',
 814             'or 3, 18, 18',
 815             'setvl 0, 0, 3, 0, 1, 1',
 816             'sv.maddedu *4, *8, 7, 3',
 817             'setvl 0, 0, 3, 0, 1, 1',
 818             'sv.or/mrr *6, *4, *4',
 819             'or 14, 3, 3',
 820             'or 3, 12, 12',
 821             'or 4, 11, 11',
 822             'or 5, 15, 15',
 823             'setvl 0, 0, 3, 0, 1, 1',
 824             'setvl 0, 0, 3, 0, 1, 1',
 825             'addic 0, 0, 0',
 826             'setvl 0, 0, 3, 0, 1, 1',
 827             'sv.or *9, *6, *6',
 828             'setvl 0, 0, 3, 0, 1, 1',
 829             'sv.or *6, *3, *3',
 830             'setvl 0, 0, 3, 0, 1, 1',
 831             'sv.adde *3, *9, *6',
 832             'setvl 0, 0, 3, 0, 1, 1',
 833             'setvl 0, 0, 3, 0, 1, 1',
 834             'setvl 0, 0, 3, 0, 1, 1',
 835             'or 16, 3, 3',
 836             'or 15, 4, 4',
 837             'or 12, 5, 5',
 838             'or 4, 14, 14',
 839             'addze *3, *4',
 840             'or 11, 3, 3',
 841             'setvl 0, 0, 3, 0, 1, 1',
 842             'sv.or *8, *20, *20',
 843             'or 7, 19, 19',
 844             'or 3, 18, 18',
 845             'setvl 0, 0, 3, 0, 1, 1',
 846             'sv.maddedu *4, *8, 7, 3',
 847             'setvl 0, 0, 3, 0, 1, 1',
 848             'sv.or/mrr *6, *4, *4',
 849             'or 14, 3, 3',
 850             'or 3, 15, 15',
 851             'or 4, 12, 12',
 852             'or 5, 11, 11',
 853             'setvl 0, 0, 3, 0, 1, 1',
 854             'setvl 0, 0, 3, 0, 1, 1',
 855             'addic 0, 0, 0',
 856             'setvl 0, 0, 3, 0, 1, 1',
 857             'sv.or *9, *6, *6',
 858             'setvl 0, 0, 3, 0, 1, 1',
 859             'sv.or *6, *3, *3',
 860             'setvl 0, 0, 3, 0, 1, 1',
 861             'sv.adde *3, *9, *6',
 862             'setvl 0, 0, 3, 0, 1, 1',
 863             'setvl 0, 0, 3, 0, 1, 1',
 864             'setvl 0, 0, 3, 0, 1, 1',
 865             'or 12, 3, 3',
 866             'or 11, 4, 4',
 867             'or 10, 5, 5',
 868             'or 4, 14, 14',
 869             'addze *3, *4',
 870             'or 9, 3, 3',
 871             'setvl 0, 0, 6, 0, 1, 1',
 872             'or 3, 17, 17',
 873             'or 4, 16, 16',
 874             'or 5, 12, 12',
 875             'or 6, 11, 11',
 876             'or 7, 10, 10',
 877             'or 8, 9, 9',
 878             'setvl 0, 0, 6, 0, 1, 1',
 879             'setvl 0, 0, 6, 0, 1, 1',
 880             'setvl 0, 0, 6, 0, 1, 1',
 881             'setvl 0, 0, 6, 0, 1, 1',
 882             'sv.or/mrr *4, *3, *3',
 883             'or 3, 23, 23',
 884             'setvl 0, 0, 6, 0, 1, 1',
 885             'sv.std *4, 0(3)'
 886         ])
 887
 888
 889 if __name__ == "__main__":
 890     unittest.main()