src/bsv/bus_transactors.py

   1
   2 axi4_lite = '''
   3 // this file is auto-generated, please do not edit
   4 package gpio_instance;
   5     /*==== Package imports ==== */
   6     import TriState          ::*;
   7     import Vector                ::*;
   8     import BUtils::*;
   9     import ConfigReg            ::*;
  10     /*============================ */
  11     /*===== Project Imports ===== */
  12     import Semi_FIFOF        :: *;
  13     import AXI4_Lite_Types   :: *;
  14     import gpio   :: *;
  15     import mux   :: *;
  16     import pinmux   :: *;
  17     /*============================ */
  18
  19   // instantiation template
  20     interface GPIO_real;
  21     interface PeripheralSide peripheral_side;
  22     interface GPIO_config#(32) bankA_config;
  23         interface AXI4_Lite_Slave_IFC#({0},{1},{2}) bankA_slave;
  24     interface GPIO_config#(15) bankB_config;
  25         interface AXI4_Lite_Slave_IFC#({0},{1},{2}) bankB_slave;
  26
  27     interface MUX_config#(32) muxbankA_config;
  28         interface AXI4_Lite_Slave_IFC#({0},{1},{2}) muxbankA_slave;
  29     interface MUX_config#(15) muxbankB_config;
  30         interface AXI4_Lite_Slave_IFC#({0},{1},{2}) muxbankB_slave;
  31     endinterface
  32   (*synthesize*)
  33   module mkgpio_real(GPIO_real);
  34     Ifc_pinmux pinmux <-mkpinmux;
  35     // gpio/mux declarations
  36 {3}
  37     interface peripheral_side=pinmux.peripheral_side;
  38   endmodule
  39 endpackage
  40 '''