pep8 cleanup
[pinmux.git] / src / bsv / interface_decl.py
1 import os.path
2
3 try:
4 from UserDict import UserDict
5 except ImportError:
6 from collections import UserDict
7
8 from bsv.wire_def import generic_io # special case
9 from bsv.wire_def import muxwire # special case
10 from ifacebase import InterfacesBase
11 from bsv.peripheral_gen import PeripheralIface
12 from bsv.peripheral_gen import PeripheralInterfaces
13
14
15 class Pin(object):
16 """ pin interface declaration.
17 * name is the name of the pin
18 * ready, enabled and io all create a (* .... *) prefix
19 * action changes it to an "in" if true
20 """
21
22 def __init__(self, name,
23 name_=None,
24 idx=None,
25 ready=True,
26 enabled=True,
27 io=False,
28 action=False,
29 bitspec=None,
30 outenmode=False):
31 self.name = name
32 self.name_ = name_
33 self.idx = idx
34 self.ready = ready
35 self.enabled = enabled
36 self.io = io
37 self.action = action
38 self.bitspec = bitspec if bitspec else 'Bit#(1)'
39 self.outenmode = outenmode
40
41 # bsv will look like this (method declaration):
42 """
43 (*always_ready,always_enabled*) method Bit#(1) io0_cell_outen;
44 (*always_ready,always_enabled,result="io"*) method
45 Action io0_inputval (Bit#(1) in);
46 """
47
48 def ifacepfmt(self, fmtfn):
49 res = ' '
50 status = []
51 res += "interface "
52 name = fmtfn(self.name_)
53 if self.action:
54 res += "Put"
55 else:
56 res += "Get"
57 res += "#(%s) %s;" % (self.bitspec, name)
58 return res
59
60 def ifacefmt(self, fmtfn):
61 res = ' '
62 status = []
63 if self.ready:
64 status.append('always_ready')
65 if self.enabled:
66 status.append('always_enabled')
67 if self.io:
68 status.append('result="io"')
69 if status:
70 res += '(*'
71 res += ','.join(status)
72 res += '*)'
73 res += " method "
74 if self.io:
75 res += "\n "
76 name = fmtfn(self.name)
77 if self.action:
78 res += " Action "
79 res += name
80 res += ' (%s in)' % self.bitspec
81 else:
82 res += " %s " % self.bitspec
83 res += name
84 res += ";"
85 return res
86
87 def ifacedef(self, fmtoutfn, fmtinfn, fmtdecfn):
88 res = ' method '
89 if self.action:
90 fmtname = fmtinfn(self.name)
91 res += "Action "
92 res += fmtdecfn(self.name)
93 res += '(%s in);\n' % self.bitspec
94 res += ' %s<=in;\n' % fmtname
95 res += ' endmethod'
96 else:
97 fmtname = fmtoutfn(self.name)
98 res += "%s=%s;" % (self.name, fmtname)
99 return res
100 # sample bsv method definition :
101 """
102 method Action cell0_mux(Bit#(2) in);
103 wrcell0_mux<=in;
104 endmethod
105 """
106
107 # sample bsv wire (wire definiton):
108 """
109 Wire#(Bit#(2)) wrcell0_mux<-mkDWire(0);
110 """
111
112 def wirefmt(self, fmtoutfn, fmtinfn, fmtdecfn):
113 res = ' Wire#(%s) ' % self.bitspec
114 if self.action:
115 res += '%s' % fmtinfn(self.name)
116 else:
117 res += '%s' % fmtoutfn(self.name)
118 res += "<-mkDWire(0);"
119 return res
120
121 def ifacedef2(self, fmtoutfn, fmtinfn, fmtdecfn):
122 if self.action:
123 fmtname = fmtinfn(self.name)
124 res = " interface %s = interface Put\n" % self.name_
125 res += ' method '
126 res += "Action put"
127 #res += fmtdecfn(self.name)
128 res += '(%s in);\n' % self.bitspec
129 res += ' %s<=in;\n' % fmtname
130 res += ' endmethod\n'
131 res += ' endinterface;'
132 else:
133 fmtname = fmtoutfn(self.name)
134 res = " interface %s = interface Get\n" % self.name_
135 res += ' method ActionValue#'
136 res += '(%s) get;\n' % self.bitspec
137 res += " return %s;\n" % (fmtname)
138 res += ' endmethod\n'
139 res += ' endinterface;'
140 return res
141
142 def ifacedef3(self, fmtoutfn, fmtinfn, fmtdecfn):
143 if self.action:
144 fmtname = fmtinfn(self.name)
145 if self.name.endswith('outen'):
146 name = "tputen"
147 else:
148 name = "tput"
149 res = " %s <= in[%d];" % (fmtname, self.idx)
150 else:
151 fmtname = fmtoutfn(self.name)
152 res = " tget[%d] = %s;" % (self.idx, fmtname)
153 name = 'tget'
154 return (name, res)
155
156
157 class Interface(PeripheralIface):
158 """ create an interface from a list of pinspecs.
159 each pinspec is a dictionary, see Pin class arguments
160 single indicates that there is only one of these, and
161 so the name must *not* be extended numerically (see pname)
162 """
163 # sample interface object:
164 """
165 twiinterface_decl = Interface('twi',
166 [{'name': 'sda', 'outen': True},
167 {'name': 'scl', 'outen': True},
168 ])
169 """
170
171 def __init__(self, ifacename, pinspecs, ganged=None, single=False):
172 PeripheralIface.__init__(self, ifacename)
173 self.ifacename = ifacename
174 self.ganged = ganged or {}
175 self.pins = [] # a list of instances of class Pin
176 self.pinspecs = pinspecs # a list of dictionary
177 self.single = single
178
179 for idx, p in enumerate(pinspecs):
180 _p = {}
181 _p.update(p)
182 if 'type' in _p:
183 del _p['type']
184 if p.get('outen') is True: # special case, generate 3 pins
185 del _p['outen']
186 for psuffix in ['out', 'outen', 'in']:
187 # changing the name (like sda) to (twi_sda_out)
188 _p['name_'] = "%s_%s" % (p['name'], psuffix)
189 _p['name'] = "%s_%s" % (self.pname(p['name']), psuffix)
190 _p['action'] = psuffix != 'in'
191 _p['idx'] = idx
192 self.pins.append(Pin(**_p))
193 # will look like {'name': 'twi_sda_out', 'action': True}
194 # {'name': 'twi_sda_outen', 'action': True}
195 #{'name': 'twi_sda_in', 'action': False}
196 # NOTice - outen key is removed
197 else:
198 name = p['name']
199 if name.isdigit(): # HACK! deals with EINT case
200 name = self.pname(name)
201 _p['name_'] = name
202 _p['idx'] = idx
203 _p['name'] = self.pname(p['name'])
204 self.pins.append(Pin(**_p))
205
206 # sample interface object:
207 """
208 uartinterface_decl = Interface('uart',
209 [{'name': 'rx'},
210 {'name': 'tx', 'action': True},
211 ])
212 """
213 """
214 getifacetype is called multiple times in actual_pinmux.py
215 x = ifaces.getifacetype(temp), where temp is uart_rx, spi_mosi
216 Purpose is to identify is function : input/output/inout
217 """
218
219 def getifacetype(self, name):
220 for p in self.pinspecs:
221 fname = "%s_%s" % (self.ifacename, p['name'])
222 # print "search", self.ifacename, name, fname
223 if fname == name:
224 if p.get('action'):
225 return 'out'
226 elif p.get('outen'):
227 return 'inout'
228 return 'input'
229 return None
230
231 def iname(self):
232 """ generates the interface spec e.g. flexbus_ale
233 if there is only one flexbus interface, or
234 sd{0}_cmd if there are several. string format
235 function turns this into sd0_cmd, sd1_cmd as
236 appropriate. single mode stops the numerical extension.
237 """
238 if self.single:
239 return self.ifacename
240 return '%s{0}' % self.ifacename
241
242 def pname(self, name):
243 """ generates the interface spec e.g. flexbus_ale
244 if there is only one flexbus interface, or
245 sd{0}_cmd if there are several. string format
246 function turns this into sd0_cmd, sd1_cmd as
247 appropriate. single mode stops the numerical extension.
248 """
249 return "%s_%s" % (self.iname(), name)
250
251 def busfmt(self, *args):
252 """ this function creates a bus "ganging" system based
253 on input from the {interfacename}.txt file.
254 only inout pins that are under the control of the
255 interface may be "ganged" together.
256 """
257 if not self.ganged:
258 return '' # when self.ganged is None
259 # print self.ganged
260 res = []
261 for (k, pnames) in self.ganged.items():
262 name = self.pname('%senable' % k).format(*args)
263 decl = 'Bit#(1) %s = 0;' % name
264 res.append(decl)
265 ganged = []
266 for p in self.pinspecs:
267 if p['name'] not in pnames:
268 continue
269 pname = self.pname(p['name']).format(*args)
270 if p.get('outen') is True:
271 outname = self.ifacefmtoutfn(pname)
272 ganged.append("%s_outen" % outname) # match wirefmt
273
274 gangedfmt = '{%s} = duplicate(%s);'
275 res.append(gangedfmt % (',\n '.join(ganged), name))
276 return '\n'.join(res) + '\n\n'
277
278 def wirefmt(self, *args):
279 res = '\n'.join(map(self.wirefmtpin, self.pins)).format(*args)
280 res += '\n'
281 return '\n' + res
282
283 def ifacepfmt(self, *args):
284 res = '\n'.join(map(self.ifacepfmtdecpin, self.pins)).format(*args)
285 return '\n' + res # pins is a list
286
287 def ifacefmt(self, *args):
288 res = '\n'.join(map(self.ifacefmtdecpin, self.pins)).format(*args)
289 return '\n' + res # pins is a list
290
291 def ifacepfmtdecfn(self, name):
292 return name
293
294 def ifacefmtdecfn(self, name):
295 return name # like: uart
296
297 def ifacefmtdecfn2(self, name):
298 return name # like: uart
299
300 def ifacefmtdecfn3(self, name):
301 """ HACK! """
302 return "%s_outen" % name # like uart_outen
303
304 def ifacefmtoutfn(self, name):
305 return "wr%s" % name # like wruart
306
307 def ifacefmtinfn(self, name):
308 return "wr%s" % name
309
310 def wirefmtpin(self, pin):
311 return pin.wirefmt(self.ifacefmtoutfn, self.ifacefmtinfn,
312 self.ifacefmtdecfn2)
313
314 def ifacepfmtdecpin(self, pin):
315 return pin.ifacepfmt(self.ifacepfmtdecfn)
316
317 def ifacefmtdecpin(self, pin):
318 return pin.ifacefmt(self.ifacefmtdecfn)
319
320 def ifacefmtpin(self, pin):
321 decfn = self.ifacefmtdecfn2
322 outfn = self.ifacefmtoutfn
323 # print pin, pin.outenmode
324 if pin.outenmode:
325 decfn = self.ifacefmtdecfn3
326 outfn = self.ifacefmtoutenfn
327 return pin.ifacedef(outfn, self.ifacefmtinfn,
328 decfn)
329
330 def ifacedef2pin(self, pin):
331 decfn = self.ifacefmtdecfn2
332 outfn = self.ifacefmtoutfn
333 # print pin, pin.outenmode
334 if pin.outenmode:
335 decfn = self.ifacefmtdecfn3
336 outfn = self.ifacefmtoutenfn
337 return pin.ifacedef2(outfn, self.ifacefmtinfn,
338 decfn)
339
340 def ifacedef(self, *args):
341 res = '\n'.join(map(self.ifacefmtpin, self.pins))
342 res = res.format(*args)
343 return '\n' + res + '\n'
344
345 def ifacedef2(self, *args):
346 res = '\n'.join(map(self.ifacedef2pin, self.pins))
347 res = res.format(*args)
348 return '\n' + res + '\n'
349
350
351 class MuxInterface(Interface):
352
353 def wirefmt(self, *args):
354 return muxwire.format(*args)
355
356
357 class IOInterface(Interface):
358
359 def ifacefmtoutenfn(self, name):
360 return "cell{0}_mux_outen"
361
362 def ifacefmtoutfn(self, name):
363 """ for now strip off io{0}_ part """
364 return "cell{0}_mux_out"
365
366 def ifacefmtinfn(self, name):
367 return "cell{0}_mux_in"
368
369 def wirefmt(self, *args):
370 return generic_io.format(*args)
371
372
373 class InterfaceGPIO(Interface):
374
375 def ifacepfmt(self, *args):
376 return """
377 interface Put#(Vector#({0}, Bit#(1))) out;
378 interface Put#(Vector#({0}, Bit#(1))) out_en;
379 interface Get#(Vector#({0}, Bit#(1))) in;
380 """.format(len(self.pinspecs))
381
382 def ifacedef2(self, *args):
383 tput = []
384 tget = []
385 tputen = []
386 for (typ, txt) in map(self.ifacedef2pin, self.pins):
387 if typ == 'tput':
388 tput.append(txt)
389 elif typ == 'tget':
390 tget.append(txt)
391 elif typ == 'tputen':
392 tputen.append(txt)
393 tput = '\n'.join(tput).format(*args)
394 tget = '\n'.join(tget).format(*args)
395 tputen = '\n'.join(tputen).format(*args)
396
397 template = """\
398 interface out = interface Put#({0})
399 method Action put(Vector#({0},Bit#(1)) in);
400 {1}
401 endmethod
402 endinterface;
403 interface out_en = interface Put#({0})
404 method Action put(Vector#({0},Bit#(1)) in);
405 {2}
406 endmethod
407 endinterface;
408 interface in = interface Get#({0})
409 method ActionValue#(Vector#({0},Bit#(1))) get;
410 Vector#({0},Bit#(1)) tget;
411 {3}
412 return tget;
413 endmethod
414 endinterface;
415 """.format(len(self.pinspecs), tput, tputen, tget)
416 return '\n' + template + '\n'
417
418 def ifacedef2pin(self, pin):
419 decfn = self.ifacefmtdecfn2
420 outfn = self.ifacefmtoutfn
421 # print pin, pin.outenmode
422 if pin.outenmode:
423 decfn = self.ifacefmtdecfn3
424 outfn = self.ifacefmtoutenfn
425 return pin.ifacedef3(outfn, self.ifacefmtinfn,
426 decfn)
427
428
429 class Interfaces(InterfacesBase, PeripheralInterfaces):
430 """ contains a list of interface definitions
431 """
432
433 def __init__(self, pth=None):
434 InterfacesBase.__init__(self, Interface, pth,
435 {'gpio': InterfaceGPIO})
436 PeripheralInterfaces.__init__(self)
437
438 def ifacedef(self, f, *args):
439 for (name, count) in self.ifacecount:
440 for i in range(count):
441 f.write(self.data[name].ifacedef(i))
442
443 def ifacedef2(self, f, *args):
444 c = " interface {0} = interface PeripheralSide{1}"
445 for (name, count) in self.ifacecount:
446 for i in range(count):
447 iname = self.data[name].iname().format(i)
448 f.write(c.format(iname, name.upper()))
449 f.write(self.data[name].ifacedef2(i))
450 f.write(" endinterface;\n\n")
451
452 def busfmt(self, f, *args):
453 f.write("import BUtils::*;\n\n")
454 for (name, count) in self.ifacecount:
455 for i in range(count):
456 bf = self.data[name].busfmt(i)
457 f.write(bf)
458
459 def ifacepfmt(self, f, *args):
460 comment = '''
461 // interface declaration between {0} and pinmux
462 (*always_ready,always_enabled*)
463 interface PeripheralSide{0};'''
464 for (name, count) in self.ifacecount:
465 f.write(comment.format(name.upper()))
466 f.write(self.data[name].ifacepfmt(0))
467 f.write("\n endinterface\n")
468
469 def ifacefmt(self, f, *args):
470 comment = '''
471 // interface declaration between %s-{0} and pinmux'''
472 for (name, count) in self.ifacecount:
473 for i in range(count):
474 c = comment % name.upper()
475 f.write(c.format(i))
476 f.write(self.data[name].ifacefmt(i))
477
478 def ifacefmt2(self, f, *args):
479 comment = '''
480 interface PeripheralSide{0} {1};'''
481 for (name, count) in self.ifacecount:
482 for i in range(count):
483 iname = self.data[name].iname().format(i)
484 f.write(comment.format(name.upper(), iname))
485
486 def wirefmt(self, f, *args):
487 comment = '\n // following wires capture signals ' \
488 'to IO CELL if %s-{0} is\n' \
489 ' // allotted to it'
490 for (name, count) in self.ifacecount:
491 for i in range(count):
492 c = comment % name
493 f.write(c.format(i))
494 f.write(self.data[name].wirefmt(i))
495
496
497 # ========= Interface declarations ================ #
498
499 mux_interface = MuxInterface('cell',
500 [{'name': 'mux', 'ready': False, 'enabled': False,
501 'bitspec': '{1}', 'action': True}])
502
503 io_interface = IOInterface(
504 'io',
505 [{'name': 'cell_out', 'enabled': True, },
506 {'name': 'cell_outen', 'enabled': True, 'outenmode': True, },
507 {'name': 'cell_in', 'action': True, 'io': True}, ])
508
509 # == Peripheral Interface definitions == #
510 # these are the interface of the peripherals to the pin mux
511 # Outputs from the peripherals will be inputs to the pinmux
512 # module. Hence the change in direction for most pins
513
514 # ======================================= #
515
516 # basic test
517 if __name__ == '__main__':
518
519 uartinterface_decl = Interface('uart',
520 [{'name': 'rx'},
521 {'name': 'tx', 'action': True},
522 ])
523
524 twiinterface_decl = Interface('twi',
525 [{'name': 'sda', 'outen': True},
526 {'name': 'scl', 'outen': True},
527 ])
528
529 def _pinmunge(p, sep, repl, dedupe=True):
530 """ munges the text so it's easier to compare.
531 splits by separator, strips out blanks, re-joins.
532 """
533 p = p.strip()
534 p = p.split(sep)
535 if dedupe:
536 p = filter(lambda x: x, p) # filter out blanks
537 return repl.join(p)
538
539 def pinmunge(p):
540 """ munges the text so it's easier to compare.
541 """
542 # first join lines by semicolons, strip out returns
543 p = p.split(";")
544 p = map(lambda x: x.replace('\n', ''), p)
545 p = '\n'.join(p)
546 # now split first by brackets, then spaces (deduping on spaces)
547 p = _pinmunge(p, "(", " ( ", False)
548 p = _pinmunge(p, ")", " ) ", False)
549 p = _pinmunge(p, " ", " ")
550 return p
551
552 def zipcmp(l1, l2):
553 l1 = l1.split("\n")
554 l2 = l2.split("\n")
555 for p1, p2 in zip(l1, l2):
556 print (repr(p1))
557 print (repr(p2))
558 print ()
559 assert p1 == p2
560
561 ifaces = Interfaces()
562
563 ifaceuart = ifaces['uart']
564 print (ifaceuart.ifacedef(0))
565 print (uartinterface_decl.ifacedef(0))
566 assert ifaceuart.ifacedef(0) == uartinterface_decl.ifacedef(0)
567
568 ifacetwi = ifaces['twi']
569 print (ifacetwi.ifacedef(0))
570 print (twiinterface_decl.ifacedef(0))
571 assert ifacetwi.ifacedef(0) == twiinterface_decl.ifacedef(0)