1 from bsv
.peripheral_gen
.base
import PBase
6 def __init__(self
, name
, masteronly
):
7 PBase
.__init
__(self
, name
)
8 self
.ifndict
= {'N': name
.upper(), 'n': name
}
9 self
.masteronly
= masteronly
10 assert masteronly
, "Only master only %s supported for now" % name
13 return " import %(n)s :: *;" % self
.ifndict
16 return "%(n)s{0}_isint" % self
.ifndict
19 return " interface %(N)s_out %(n)s{0}_out;\n" + \
20 " method Bit#(1) %s;" % self
.irq_name
22 def num_axi_regs32(self
):
25 def mkslow_peripheral(self
, size
=0):
26 return " Ifc_%(n)s %(n)s{0} <- mk%(n)s();" % self
.ifndict
28 def _mk_connection(self
, name
=None, count
=0):
29 return "%(n)s{0}.slave" % self
.ifndict
31 def pinname_out(self
, pname
):
32 return {'ck': 'out.clk_o',
36 def __disable_pinname_outen(self
, pname
):
41 def mk_pincon(self
, name
, count
):
42 ret
= [PBase
.mk_pincon(self
, name
, count
)]
43 # special-case for gpio in, store in a temporary vector
44 plen
= len(self
.peripheral
.pinspecs
)
45 template
= " mkConnection({0}.{1},\n\t\t\t{2}.{1});"
46 sname
= self
.peripheral
.iname().format(count
)
47 name
= self
.get_iname(count
)
48 ps
= "pinmux.peripheral_side.%s" % sname
49 n
= "{0}.out".format(name
)
50 for ptype
in ['io_out', 'io_out_en', 'io_in']:
51 ret
.append(template
.format(ps
, ptype
, n
))
57 def plic_object(self
, pname
, idx
):
58 return "{0}.interrupts()[{1}]".format(pname
, idx
)
60 def mk_ext_ifacedef(self
, iname
, inum
):
61 name
= self
.get_iname(inum
)
62 return " method {0}_isint = {0}.interrupts[5];".format(name
)
64 def slowifdeclmux(self
, name
, count
):
65 sname
= self
.get_iname(count
)
66 return " method Bit#(1) %s_isint;" % sname