dadd7ca3978529375cc2b96c90a51c4ff16ac9b1
1 from bsv
.peripheral_gen
.base
import PBase
6 def __init__(self
, name
, masteronly
):
7 PBase
.__init
__(self
, name
)
8 self
.ifndict
= {'N': name
.upper(), 'n': name
}
9 self
.masteronly
= masteronly
10 assert masteronly
, "Only master only %s supported for now" % name
13 return " import %(n)s :: *;" % self
.ifndict
16 return " interface %(N)s_out %(n)s{0}_out;\n" + \
17 " method Bit#(1) %(n)s{0}_isint;" % self
.ifndict
19 def num_axi_regs32(self
):
22 def mkslow_peripheral(self
, size
=0):
23 return " Ifc_%(n)s %(n)s{0} <- mk%(n)s();" % self
.ifndict
25 def _mk_connection(self
, name
=None, count
=0):
26 return "%(n)s{0}.slave" % self
.ifndict
28 def pinname_out(self
, pname
):
29 return {'ck': 'out.clk_o',
33 def __disable_pinname_outen(self
, pname
):
38 def mk_pincon(self
, name
, count
):
39 ret
= [PBase
.mk_pincon(self
, name
, count
)]
40 # special-case for gpio in, store in a temporary vector
41 plen
= len(self
.peripheral
.pinspecs
)
42 template
= " mkConnection({0}.{1},\n\t\t\t{2}.{1});"
43 sname
= self
.peripheral
.iname().format(count
)
44 name
= self
.get_iname(count
)
45 ps
= "pinmux.peripheral_side.%s" % sname
46 n
= "{0}.out".format(name
)
47 for ptype
in ['io_out', 'io_out_en', 'io_in']:
48 ret
.append(template
.format(ps
, ptype
, n
))
54 def plic_object(self
, pname
, idx
):
55 return "{0}.interrupts()[{1}]".format(pname
, idx
)
57 def mk_ext_ifacedef(self
, iname
, inum
):
58 name
= self
.get_iname(inum
)
59 return " method {0}_isint = {0}.interrupts[5];".format(name
)
61 def slowifdeclmux(self
, name
, count
):
62 sname
= self
.get_iname(count
)
63 return " method Bit#(1) %s_isint;" % sname