1 from bsv
.peripheral_gen
.base
import PBase
7 return "import rgbttl_dummy :: *;"
9 def has_axi_master(self
):
12 def num_axi_regs32(self
):
15 def mkfast_peripheral(self
):
16 sz
= len(self
.peripheral
.pinspecs
) - 4 # subtract CK, DE, HS, VS
17 return "Ifc_rgbttl_dummy lcd{0} <- mkrgbttl_dummy();"
19 def _mk_connection(self
, name
=None, count
=0):
22 def pinname_out(self
, pname
):
23 if not pname
.startswith('out'):
27 def get_clock_reset(self
, name
, count
):
28 return "slow_clock, slow_reset"
30 def _mk_pincon(self
, name
, count
, ptyp
):
31 ret
= [PBase
._mk
_pincon
(self
, name
, count
, ptyp
)]
33 sname
= self
.get_iname(count
)
34 ps
= "slow_peripherals.%s" % sname
36 sname
= self
.peripheral
.iname().format(count
)
37 ps
= "pinmux.peripheral_side.%s" % sname
38 name
= self
.get_iname(count
)
39 n
= "{0}".format(name
)
40 for ptype
in ['data_out']:
41 ps_
= "{0}.{1}".format(ps
, ptype
)
42 ret
+= self
._mk
_actual
_connection
('out', name
, count
, 'out',
46 def _mk_clk_con(self
, name
, count
, ctype
):
47 ret
= [PBase
._mk
_clk
_con
(self
, name
, count
, ctype
)]
48 ck
= self
.get_clock_reset(name
, count
)
49 if ck
== PBase
.get_clock_reset(self
, name
, count
):
52 spc
= "sp_clock, sp_reset"
54 spc
= "fast_clock, fast_reset"
56 Ifc_sync#({0}) {1}_sync <-mksyncconnection(
59 # one pin, data_out, might as well hard-code it
63 n_
= "{0}{1}".format(n
, count
)
64 n_
= '{0}_{1}'.format(n_
, pname
)
65 sz
= len(self
.peripheral
.pinspecs
) - 4 # subtract CK, DE, HS, VS
66 ret
.append(template
.format("Bit#(%d)" % sz
, n_
, ck
, spc
))