23db979c1780043fe9c3496a95f59e01cac80f2c
2 from copy
import deepcopy
7 def axibase(self
, name
, ifacenum
):
9 return "%(name)s%(ifacenum)dBase" % locals()
11 def axiend(self
, name
, ifacenum
):
13 return "%(name)s%(ifacenum)dEnd" % locals()
15 def axi_reg_def(self
, start
, name
, ifacenum
):
17 offs
= self
.num_axi_regs32() * 4 * 16
18 end
= start
+ offs
- 1
19 bname
= self
.axibase(name
, ifacenum
)
20 bend
= self
.axiend(name
, ifacenum
)
21 comment
= "%d 32-bit regs" % self
.num_axi_regs32()
22 return (" `define%(bname)s 'h%(start)08X\n"
23 " `define%(bend)s 'h%(end)08X // %(comment)s" % locals(),
26 def axi_slave_name(self
, name
, ifacenum
):
28 return "{0}{1}_slave_num".format(name
, ifacenum
)
30 def axi_slave_idx(self
, idx
, name
, ifacenum
):
31 name
= self
.axi_slave_name(name
, ifacenum
)
32 return ("typedef {0} {1};".format(idx
, name
), 1)
34 def axi_addr_map(self
, name
, ifacenum
):
35 bname
= self
.axibase(name
, ifacenum
)
36 bend
= self
.axiend(name
, ifacenum
)
37 name
= self
.axi_slave_name(name
, ifacenum
)
39 if(addr>=`{0} && addr<=`{1})
40 return tuple2(True,fromInteger(valueOf({2})));
41 else""".format(bname
, bend
, name
)
43 def mkslow_peripheral(self
, name
, ifacenum
):
52 return " import Uart16550 :: *;"
55 return " interface RS232_PHY_Ifc uart{0}_coe;\n" + \
56 " method Bit#(1) uart{0}_intr;"
58 def num_axi_regs32(self
):
61 def mkslow_peripheral(self
):
62 return " Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
63 " mkUart16550(clocked_by uart_clock,\n" + \
64 " reset_by uart_reset, sp_clock, sp_reset);"
72 return " import Uart_bs::*;\n" + \
73 " import RS232_modified::*;"
76 return " interface RS232 uart{0}_coe;"
78 def num_axi_regs32(self
):
81 def mkslow_peripheral(self
):
82 return " //Ifc_Uart_bs uart{0} <-" + \
83 " // mkUart_bs(clocked_by uart_clock,\n" + \
84 " // reset_by uart_reset,sp_clock, sp_reset);" +\
85 " Ifc_Uart_bs uart{0} <-" + \
86 " mkUart_bs(clocked_by sp_clock,\n" + \
87 " reset_by sp_reset, sp_clock, sp_reset);"
95 return " import I2C_top :: *;"
98 return " interface I2C_out i2c{0}_out;\n" + \
99 " method Bit#(1) i2c{0}_isint;"
101 def num_axi_regs32(self
):
104 def mkslow_peripheral(self
):
105 return " I2C_IFC i2c{0} <- mkI2CController();"
112 def slowimport(self
):
113 return " import qspi :: *;"
115 def slowifdecl(self
):
116 return " interface QSPI_out qspi{0}_out;\n" + \
117 " method Bit#(1) qspi{0}_isint;"
119 def num_axi_regs32(self
):
122 def mkslow_peripheral(self
):
123 return " Ifc_qspi qspi{0} <- mkqspi();"
130 def slowimport(self
):
131 return " import pwm::*;"
133 def slowifdecl(self
):
134 return " interface PWMIO pwm{0}_o;"
136 def num_axi_regs32(self
):
139 def mkslow_peripheral(self
):
140 return " Ifc_PWM_bus pwm_bus <- mkPWM_bus(sp_clock);"
148 def slowimport(self
):
149 return " import pinmux::*;\n" + \
150 " import mux::*;\n" + \
153 def slowifdecl(self
):
154 return " interface GPIO_config#({1}) pad_config{0};"
156 def num_axi_regs32(self
):
159 def axi_slave_idx(self
, idx
, name
, ifacenum
):
160 """ generates AXI slave number definition, except
161 GPIO also has a muxer per bank
164 (ret
, x
) = PBase
.axi_slave_idx(self
, idx
, name
, ifacenum
)
165 (ret2
, x
) = PBase
.axi_slave_idx(self
, idx
, "mux", ifacenum
)
166 return ("%s\n%s" % (ret
, ret2
), 2)
168 def mkslow_peripheral(self
):
169 return " MUX#({1}) mux{0} <- mkmux();\n" + \
170 " GPIO#({1}) gpio{0} <- mkgpio();"
173 axi_slave_declarations
= """\
174 typedef 0 SlowMaster;
176 typedef TAdd#(LastGen_slave_num,`ifdef CLINT 1 `else 0 `endif )
178 typedef TAdd#(CLINT_slave_num ,`ifdef PLIC 1 `else 0 `endif )
180 typedef TAdd#(Plic_slave_num ,`ifdef AXIEXP 1 `else 0 `endif )
182 typedef TAdd#(AxiExp1_slave_num,1) Num_Slow_Slaves;
185 class CallFn(object):
186 def __init__(self
, peripheral
, name
):
187 self
.peripheral
= peripheral
190 def __call__(self
, *args
):
191 #print "__call__", self.name, args
192 if not self
.peripheral
.slow
:
194 return getattr(self
.peripheral
.slow
, self
.name
)(*args
[1:])
196 class PeripheralIface(object):
197 def __init__(self
, ifacename
):
199 slow
= slowfactory
.getcls(ifacename
)
202 for fname
in ['slowimport', 'slowifdecl']:
203 fn
= CallFn(self
, fname
)
204 setattr(self
, fname
, types
.MethodType(fn
, self
))
206 #print "PeripheralIface"
209 def axi_reg_def(self
, start
, count
):
212 return self
.slow
.axi_reg_def(start
, self
.ifacename
, count
)
214 def axi_slave_idx(self
, start
, count
):
217 return self
.slow
.axi_slave_idx(start
, self
.ifacename
, count
)
219 def axi_addr_map(self
, count
):
222 return self
.slow
.axi_addr_map(self
.ifacename
, count
)
224 def mkslow_periph(self
, count
):
227 return self
.slow
.mkslow_peripheral().format(count
, self
.ifacename
)
229 class PeripheralInterfaces(object):
233 def slowimport(self
, *args
):
235 for (name
, count
) in self
.ifacecount
:
236 #print "slowimport", name, self.data[name].slowimport
237 ret
.append(self
.data
[name
].slowimport())
238 return '\n'.join(list(filter(None, ret
)))
240 def slowifdecl(self
, *args
):
242 for (name
, count
) in self
.ifacecount
:
243 for i
in range(count
):
244 ret
.append(self
.data
[name
].slowifdecl().format(i
, name
))
245 return '\n'.join(list(filter(None, ret
)))
247 def axi_reg_def(self
, *args
):
249 start
= 0x00011100 # start of AXI peripherals address
250 for (name
, count
) in self
.ifacecount
:
251 for i
in range(count
):
252 x
= self
.data
[name
].axi_reg_def(start
, i
)
253 #print ("ifc", name, x)
257 return '\n'.join(list(filter(None, ret
)))
259 def axi_slave_idx(self
, *args
):
262 for (name
, count
) in self
.ifacecount
:
263 for i
in range(count
):
264 (rdef
, offs
) = self
.data
[name
].axi_slave_idx(start
, i
)
265 #print ("ifc", name, rdef, offs)
268 ret
.append("typedef %d LastGen_slave_num" % (start
- 1))
269 decls
= '\n'.join(list(filter(None, ret
)))
270 return axi_slave_declarations
.format(decls
)
272 def axi_addr_map(self
, *args
):
274 for (name
, count
) in self
.ifacecount
:
275 for i
in range(count
):
276 ret
.append(self
.data
[name
].axi_addr_map(i
))
277 return '\n'.join(list(filter(None, ret
)))
279 def mkslow_periph(self
, *args
):
281 for (name
, count
) in self
.ifacecount
:
282 for i
in range(count
):
283 ret
.append(self
.data
[name
].mkslow_periph(i
))
284 return '\n'.join(list(filter(None, ret
)))
287 class PFactory(object):
288 def getcls(self
, name
):
289 return {'uart': uart
,
298 slowfactory
= PFactory()
300 if __name__
== '__main__':