src/bsv/peripheral_gen.py

   1 import types
   2 from copy import deepcopy
   3
   4
   5 class PBase(object):
   6     def __init__(self, name):
   7         self.name = name
   8
   9     def axibase(self, name, ifacenum):
  10         name = name.upper()
  11         return "%(name)s%(ifacenum)dBase" % locals()
  12
  13     def axiend(self, name, ifacenum):
  14         name = name.upper()
  15         return "%(name)s%(ifacenum)dEnd" % locals()
  16
  17     def axi_reg_def(self, start, name, ifacenum):
  18         name = name.upper()
  19         offs = self.num_axi_regs32() * 4 * 16
  20         end = start + offs - 1
  21         bname = self.axibase(name, ifacenum)
  22         bend = self.axiend(name, ifacenum)
  23         comment = "%d 32-bit regs" % self.num_axi_regs32()
  24         return ("    `define%(bname)s 'h%(start)08X\n"
  25                 "    `define%(bend)s  'h%(end)08X // %(comment)s" % locals(),
  26                 offs)
  27
  28     def axi_slave_name(self, name, ifacenum):
  29         name = name.upper()
  30         return "{0}{1}_slave_num".format(name, ifacenum)
  31
  32     def axi_slave_idx(self, idx, name, ifacenum):
  33         name = self.axi_slave_name(name, ifacenum)
  34         return ("typedef {0} {1};".format(idx, name), 1)
  35
  36     def axi_addr_map(self, name, ifacenum):
  37         bname = self.axibase(name, ifacenum)
  38         bend = self.axiend(name, ifacenum)
  39         name = self.axi_slave_name(name, ifacenum)
  40         return """\
  41         if(addr>=`{0} && addr<=`{1})
  42             return tuple2(True,fromInteger(valueOf({2})));
  43         else""".format(bname, bend, name)
  44
  45     def mkslow_peripheral(self):
  46         return ''
  47
  48     def mk_connection(self, count):
  49         aname = self.axi_slave_name(self.name, count)
  50         txt =  "        mkConnection (slow_fabric.v_to_slaves\n" + \
  51                "                    [fromInteger(valueOf({1}))],\n" + \
  52                "                    {0});"
  53
  54         con = self._mk_connection().format(count, aname)
  55         if not con:
  56             return ''
  57         return txt.format(con, aname)
  58
  59     def _mk_connection(self):
  60         return ''
  61
  62
  63 class uart(PBase):
  64
  65     def slowimport(self):
  66         return "          import Uart16550         :: *;"
  67
  68     def slowifdecl(self):
  69         return "            interface RS232_PHY_Ifc uart{0}_coe;\n" + \
  70                "            method Bit#(1) uart{0}_intr;"
  71
  72     def num_axi_regs32(self):
  73         return 8
  74
  75     def mkslow_peripheral(self):
  76         return "        Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
  77                "                mkUart16550(clocked_by uart_clock,\n" + \
  78                "                    reset_by uart_reset, sp_clock, sp_reset);"
  79
  80     def _mk_connection(self):
  81         return "uart{0}.slave_axi_uart"
  82
  83
  84
  85 class rs232(PBase):
  86
  87     def slowimport(self):
  88         return "        import Uart_bs::*;\n" + \
  89                "        import RS232_modified::*;"
  90
  91     def slowifdecl(self):
  92         return "            interface RS232 uart{0}_coe;"
  93
  94     def num_axi_regs32(self):
  95         return 2
  96
  97     def mkslow_peripheral(self):
  98         return "        //Ifc_Uart_bs uart{0} <-" + \
  99                "        //       mkUart_bs(clocked_by uart_clock,\n" + \
 100                "        //          reset_by uart_reset,sp_clock, sp_reset);" +\
 101                "        Ifc_Uart_bs uart{0} <-" + \
 102                "                mkUart_bs(clocked_by sp_clock,\n" + \
 103                "                    reset_by sp_reset, sp_clock, sp_reset);"
 104
 105     def _mk_connection(self):
 106         return "uart{0}.slave_axi_uart"
 107
 108
 109 class twi(PBase):
 110
 111     def slowimport(self):
 112         return "        import I2C_top           :: *;"
 113
 114     def slowifdecl(self):
 115         return "            interface I2C_out i2c{0}_out;\n" + \
 116                "            method Bit#(1) i2c{0}_isint;"
 117
 118     def num_axi_regs32(self):
 119         return 8
 120
 121     def mkslow_peripheral(self):
 122         return "        I2C_IFC i2c{0} <- mkI2CController();"
 123
 124     def _mk_connection(self):
 125         return "i2c{0}.slave_i2c_axi"
 126
 127
 128 class qspi(PBase):
 129
 130     def slowimport(self):
 131         return "        import qspi              :: *;"
 132
 133     def slowifdecl(self):
 134         return "            interface QSPI_out qspi{0}_out;\n" + \
 135                "            method Bit#(1) qspi{0}_isint;"
 136
 137     def num_axi_regs32(self):
 138         return 13
 139
 140     def mkslow_peripheral(self):
 141         return "        Ifc_qspi qspi{0} <-  mkqspi();"
 142
 143     def _mk_connection(self):
 144         return "qspi{0}.slave"
 145
 146
 147 class pwm(PBase):
 148
 149     def slowimport(self):
 150         return "        import pwm::*;"
 151
 152     def slowifdecl(self):
 153         return "        interface PWMIO pwm{0}_o;"
 154
 155     def num_axi_regs32(self):
 156         return 4
 157
 158     def mkslow_peripheral(self):
 159         return "        Ifc_PWM_bus pwm_bus <- mkPWM_bus(sp_clock);"
 160
 161
 162 class gpio(PBase):
 163
 164     def slowimport(self):
 165         return "     import pinmux::*;\n" + \
 166                "     import mux::*;\n" + \
 167                "     import gpio::*;\n"
 168
 169     def slowifdecl(self):
 170         return "        interface GPIO_config#({1}) pad_config{0};"
 171
 172     def num_axi_regs32(self):
 173         return 2
 174
 175     def axi_slave_idx(self, idx, name, ifacenum):
 176         """ generates AXI slave number definition, except
 177             GPIO also has a muxer per bank
 178         """
 179         name = name.upper()
 180         (ret, x) = PBase.axi_slave_idx(self, idx, name, ifacenum)
 181         (ret2, x) = PBase.axi_slave_idx(self, idx, "mux", ifacenum)
 182         return ("%s\n%s" % (ret, ret2), 2)
 183
 184     def mkslow_peripheral(self):
 185         return "          MUX#({1}) mux{0} <- mkmux();\n" + \
 186                "          GPIO#({1}) gpio{0} <- mkgpio();"
 187
 188
 189 axi_slave_declarations = """\
 190 typedef  0  SlowMaster;
 191 {0}
 192 typedef  TAdd#(LastGen_slave_num,`ifdef CLINT       1 `else 0 `endif )
 193               CLINT_slave_num;
 194 typedef  TAdd#(CLINT_slave_num  ,`ifdef PLIC        1 `else 0 `endif )
 195               Plic_slave_num;
 196 typedef  TAdd#(Plic_slave_num   ,`ifdef AXIEXP      1 `else 0 `endif )
 197               AxiExp1_slave_num;
 198 typedef TAdd#(AxiExp1_slave_num,1) Num_Slow_Slaves;
 199 """
 200
 201
 202 class CallFn(object):
 203     def __init__(self, peripheral, name):
 204         self.peripheral = peripheral
 205         self.name = name
 206
 207     def __call__(self, *args):
 208         #print "__call__", self.name, args
 209         if not self.peripheral.slow:
 210             return ''
 211         return getattr(self.peripheral.slow, self.name)(*args[1:])
 212
 213
 214 class PeripheralIface(object):
 215     def __init__(self, ifacename):
 216         self.slow = None
 217         slow = slowfactory.getcls(ifacename)
 218         if slow:
 219             self.slow = slow(ifacename)
 220         for fname in ['slowimport', 'slowifdecl', 'mkslow_peripheral',
 221                       'mk_connection']:
 222             fn = CallFn(self, fname)
 223             setattr(self, fname, types.MethodType(fn, self))
 224
 225         #print "PeripheralIface"
 226         #print dir(self)
 227
 228     def axi_reg_def(self, start, count):
 229         if not self.slow:
 230             return ('', 0)
 231         return self.slow.axi_reg_def(start, self.ifacename, count)
 232
 233     def axi_slave_idx(self, start, count):
 234         if not self.slow:
 235             return ('', 0)
 236         return self.slow.axi_slave_idx(start, self.ifacename, count)
 237
 238     def axi_addr_map(self, count):
 239         if not self.slow:
 240             return ''
 241         return self.slow.axi_addr_map(self.ifacename, count)
 242
 243
 244 class PeripheralInterfaces(object):
 245     def __init__(self):
 246         pass
 247
 248     def slowimport(self, *args):
 249         ret = []
 250         for (name, count) in self.ifacecount:
 251             #print "slowimport", name, self.data[name].slowimport
 252             ret.append(self.data[name].slowimport())
 253         return '\n'.join(list(filter(None, ret)))
 254
 255     def slowifdecl(self, *args):
 256         ret = []
 257         for (name, count) in self.ifacecount:
 258             for i in range(count):
 259                 ret.append(self.data[name].slowifdecl().format(i, name))
 260         return '\n'.join(list(filter(None, ret)))
 261
 262     def axi_reg_def(self, *args):
 263         ret = []
 264         start = 0x00011100  # start of AXI peripherals address
 265         for (name, count) in self.ifacecount:
 266             for i in range(count):
 267                 x = self.data[name].axi_reg_def(start, i)
 268                 #print ("ifc", name, x)
 269                 (rdef, offs) = x
 270                 ret.append(rdef)
 271                 start += offs
 272         return '\n'.join(list(filter(None, ret)))
 273
 274     def axi_slave_idx(self, *args):
 275         ret = []
 276         start = 0
 277         for (name, count) in self.ifacecount:
 278             for i in range(count):
 279                 (rdef, offs) = self.data[name].axi_slave_idx(start, i)
 280                 #print ("ifc", name, rdef, offs)
 281                 ret.append(rdef)
 282                 start += offs
 283         ret.append("typedef %d LastGen_slave_num" % (start - 1))
 284         decls = '\n'.join(list(filter(None, ret)))
 285         return axi_slave_declarations.format(decls)
 286
 287     def axi_addr_map(self, *args):
 288         ret = []
 289         for (name, count) in self.ifacecount:
 290             for i in range(count):
 291                 ret.append(self.data[name].axi_addr_map(i))
 292         return '\n'.join(list(filter(None, ret)))
 293
 294     def mkslow_peripheral(self, *args):
 295         ret = []
 296         for (name, count) in self.ifacecount:
 297             for i in range(count):
 298                 ret.append(self.data[name].mkslow_peripheral().format(i))
 299         return '\n'.join(list(filter(None, ret)))
 300
 301     def mk_connection(self, *args):
 302         ret = []
 303         for (name, count) in self.ifacecount:
 304             for i in range(count):
 305                 txt = self.data[name].mk_connection(i)
 306                 ret.append(txt)
 307         return '\n'.join(list(filter(None, ret)))
 308
 309
 310 class PFactory(object):
 311     def getcls(self, name):
 312         return {'uart': uart,
 313                 'rs232': rs232,
 314                 'twi': twi,
 315                 'qspi': qspi,
 316                 'pwm': pwm,
 317                 'gpio': gpio
 318                 }.get(name, None)
 319
 320
 321 slowfactory = PFactory()
 322
 323 if __name__ == '__main__':
 324     p = uart()
 325     print p.slowimport()
 326     print p.slowifdecl()