add `define generator
[pinmux.git] / src / bsv / peripheral_gen.py
1 class PBase(object):
2 pass
3
4 def axi_reg_def(self, start, name, ifacenum):
5 name = name.upper()
6 offs = self.num_axi_regs32()*4
7 end = start + offs - 1
8 return (" `define%(name)s%(ifacenum)dBase 'h%(start)08x'\n" \
9 " `define%(name)s%(ifacenum)dEnd 'h%(end)08x'\n" % locals(),
10 offs)
11
12
13 class uart(PBase):
14 def importfn(self):
15 return " import Uart16550 :: *;"
16
17 def ifacedecl(self):
18 return " interface RS232_PHY_Ifc uart{0}_coe;\n" \
19 " method Bit#(1) uart{0}_intr;"
20
21 def num_axi_regs32(self):
22 return 8
23
24
25 class rs232(PBase):
26 def importfn(self):
27 return " import Uart_bs::*;\n" \
28 " import RS232_modified::*;"
29
30 def ifacedecl(self):
31 return " interface RS232 uart{0}_coe;"
32
33 def num_axi_regs32(self):
34 return 2
35
36
37 class twi(PBase):
38 def importfn(self):
39 return " import I2C_top :: *;"
40
41 def ifacedecl(self):
42 return " interface I2C_out i2c{0}_out;\n" \
43 " method Bit#(1) i2c{0}_isint;"
44
45 def num_axi_regs32(self):
46 return 8
47
48
49 class qspi(PBase):
50 def importfn(self):
51 return " import qspi :: *;"
52
53 def ifacedecl(self):
54 return " interface QSPI_out qspi{0}_out;\n" \
55 " method Bit#(1) qspi{0}_isint;"
56
57 def num_axi_regs32(self):
58 return 13
59
60
61 class pwm(PBase):
62 def importfn(self):
63 return " import pwm::*;"
64
65 def ifacedecl(self):
66 return " interface PWMIO pwm_o;"
67
68 def num_axi_regs32(self):
69 return 4
70
71
72 class gpio(PBase):
73 def importfn(self):
74 return " import pinmux::*;\n" \
75 " import mux::*;\n" \
76 " import gpio::*;\n"
77
78 def ifacedecl(self):
79 return " interface GPIO_config#({1}) pad_config{0};"
80
81 def num_axi_regs32(self):
82 return 2
83
84
85 class PFactory(object):
86 def getcls(self, name):
87 return {'uart': uart,
88 'rs232': rs232,
89 'twi': twi,
90 'qspi': qspi,
91 'pwm': pwm,
92 'gpio': gpio
93 }.get(name, None)