src/bsv/wire_def.py

   1 # == Intermediate wire definitions, special cases ==#
   2 muxwire = '''
   3       Wire#({1}) wrcell{0}_mux<-mkDWire(0);'''
   4 generic_io = '''
   5       Wire#(Bit#(1)) cell{0}_mux_out<-mkDWire(0);
   6       Wire#(Bit#(1)) cell{0}_mux_outen<-mkDWire(0);
   7       Wire#(Bit#(1)) cell{0}_mux_in<-mkDWire(0);
   8 '''