ab7400640877aa2e723eba8041a684b7c8d46220
[ieee754fpu.git] / src / ieee754 / cordic / fp_pipe_init_stages.py
1 from nmigen import Module, Signal, Cat, Const, Mux
2 from nmigen.cli import main, verilog
3
4 from ieee754.fpcommon.fpbase import FPNumDecode, FPNumBaseRecord
5
6 from nmutil.pipemodbase import PipeModBase
7 from ieee754.fpcommon.basedata import FPBaseData
8 from ieee754.fpcommon.denorm import FPSCData
9
10
11 class FPCordicInitStage(PipeModBase):
12 def __init__(self, pspec):
13 super().__init__(pspec, "specialcases")
14
15 def ispec(self):
16 return FPBaseData(self.pspec)
17
18 def ospec(self):
19 return FPSCData(self.pspec, False)
20
21 def elaborate(self, platform):
22 m = Module()
23 comb = m.d.comb
24
25 # decode a/b
26 width = self.pspec.width
27 a1 = FPNumBaseRecord(width, False)
28 m.submodules.sc_decode_a = a1 = FPNumDecode(None, a1)
29 comb += [a1.v.eq(self.i.a),
30 self.o.a.eq(a1)
31 ]
32
33 # pass through context
34 comb += self.o.ctx.eq(self.i.ctx)
35
36 return m