ab7400640877aa2e723eba8041a684b7c8d46220
1 from nmigen
import Module
, Signal
, Cat
, Const
, Mux
2 from nmigen
.cli
import main
, verilog
4 from ieee754
.fpcommon
.fpbase
import FPNumDecode
, FPNumBaseRecord
6 from nmutil
.pipemodbase
import PipeModBase
7 from ieee754
.fpcommon
.basedata
import FPBaseData
8 from ieee754
.fpcommon
.denorm
import FPSCData
11 class FPCordicInitStage(PipeModBase
):
12 def __init__(self
, pspec
):
13 super().__init
__(pspec
, "specialcases")
16 return FPBaseData(self
.pspec
)
19 return FPSCData(self
.pspec
, False)
21 def elaborate(self
, platform
):
26 width
= self
.pspec
.width
27 a1
= FPNumBaseRecord(width
, False)
28 m
.submodules
.sc_decode_a
= a1
= FPNumDecode(None, a1
)
29 comb
+= [a1
.v
.eq(self
.i
.a
),
33 # pass through context
34 comb
+= self
.o
.ctx
.eq(self
.i
.ctx
)