src/ieee754/cordic/test/test_fp_pipe.py

   1 from nmigen import Module, Signal
   2 from nmigen.back.pysim import Simulator, Passive
   3 from nmigen.test.utils import FHDLTestCase
   4 from nmigen.cli import rtlil
   5 from sfpy import Float32
   6
   7 from ieee754.cordic.fp_pipeline import FPCordicBasePipe
   8 from ieee754.cordic.fp_pipe_data import FPCordicPipeSpec
   9 import unittest
  10 import math
  11 import random
  12
  13
  14 class SinCosTestCase(FHDLTestCase):
  15     def run_test(self, inputs):
  16         m = Module()
  17         pspec = FPCordicPipeSpec(width=32, rounds_per_stage=4, num_rows=1)
  18         m.submodules.dut = dut = FPCordicBasePipe(pspec)
  19
  20         for port in dut.ports():
  21             print ("port", port)
  22
  23         # vl = rtlil.convert(dut, ports=dut.ports())
  24         # with open("test_cordic_pipe_sin_cos.il", "w") as f:
  25         #     f.write(vl)
  26
  27         z = Signal(dut.p.data_i.a.shape())
  28         z_valid = Signal()
  29         ready = Signal()
  30
  31         m.d.comb += [
  32             dut.p.data_i.a.eq(z),
  33             dut.p.valid_i.eq(z_valid),
  34             dut.n.ready_i.eq(ready),
  35             ]
  36
  37         sim = Simulator(m)
  38         sim.add_clock(1e-6)
  39
  40         def writer_process():
  41             for val in inputs:
  42                 print(val)
  43                 yield z.eq(val.bits)
  44                 yield z_valid.eq(1)
  45                 yield ready.eq(1)
  46                 yield
  47
  48         sim.add_sync_process(writer_process)
  49         with sim.write_vcd("fp_pipeline.vcd", "fp_pipeline.gtkw", traces=[
  50                 z]):
  51             sim.run()
  52
  53     def test_rand(self):
  54         fracbits = 16
  55         M = (1 << fracbits)
  56         ZMAX = int(round(M * math.pi/2))
  57         inputs = []
  58         for i in range(10):
  59             inputs.append(Float32(1.0*i))
  60         self.run_test(iter(inputs))
  61
  62
  63 if __name__ == "__main__":
  64     unittest.main()