72e22c26062a611adc5650949328fa2fca8397df
1 """ key strategic example showing how to do multi-input fan-in into a
2 multi-stage pipeline, then multi-output fanout.
4 the multiplex ID from the fan-in is passed in to the pipeline, preserved,
5 and used as a routing ID on the fanout.
8 from random
import randint
9 from nmigen
.compat
.sim
import run_simulation
10 from nmigen
.cli
import verilog
, rtlil
14 def __init__(self
, dut
, width
, fpkls
, fpop
, vals
, single_op
, opcode
):
18 self
.single_op
= single_op
22 self
.tlen
= len(vals
) // dut
.num_rows
24 for muxid
in range(dut
.num_rows
):
27 for i
in range(self
.tlen
):
31 if isinstance(op1
, tuple):
34 res
= self
.fpop(self
.fpkls(op1
))
35 self
.di
[muxid
][i
] = (op1
, )
37 (op1
, op2
, ) = vals
.pop(0)
38 #print ("test", hex(op1), hex(op2))
39 res
= self
.fpop(self
.fpkls(op1
), self
.fpkls(op2
))
40 self
.di
[muxid
][i
] = (op1
, op2
)
41 if hasattr(res
, "bits"):
42 self
.do
[muxid
].append(res
.bits
)
44 self
.do
[muxid
].append(res
) # for FP to INT
46 def send(self
, muxid
):
47 for i
in range(self
.tlen
):
49 op1
, = self
.di
[muxid
][i
]
51 op1
, op2
= self
.di
[muxid
][i
]
52 rs
= self
.dut
.p
[muxid
]
53 yield rs
.valid_i
.eq(1)
54 yield rs
.data_i
.a
.eq(op1
)
55 if self
.opcode
is not None:
56 yield rs
.data_i
.ctx
.op
.eq(self
.opcode
)
57 if not self
.single_op
:
58 yield rs
.data_i
.b
.eq(op2
)
59 yield rs
.data_i
.muxid
.eq(muxid
)
61 o_p_ready
= yield rs
.ready_o
64 o_p_ready
= yield rs
.ready_o
67 fop1
= self
.fpkls(op1
)
69 if hasattr(res
, "bits"):
73 print("send", muxid
, i
, hex(op1
), hex(r
),
76 fop1
= self
.fpkls(op1
)
77 fop2
= self
.fpkls(op2
)
78 res
= self
.fpop(fop1
, fop2
)
79 print("send", muxid
, i
, hex(op1
), hex(op2
), hex(res
.bits
),
82 yield rs
.valid_i
.eq(0)
83 # wait random period of time before queueing another value
84 for i
in range(randint(0, 3)):
87 yield rs
.valid_i
.eq(0)
90 print("send ended", muxid
)
92 ## wait random period of time before queueing another value
93 #for i in range(randint(0, 3)):
96 #send_range = randint(0, 3)
100 # send = randint(0, send_range) != 0
102 def rcv(self
, muxid
):
104 #stall_range = randint(0, 3)
105 #for j in range(randint(1,10)):
106 # stall = randint(0, stall_range) != 0
107 # yield self.dut.n[0].ready_i.eq(stall)
109 n
= self
.dut
.n
[muxid
]
110 yield n
.ready_i
.eq(1)
112 o_n_valid
= yield n
.valid_o
113 i_n_ready
= yield n
.ready_i
114 if not o_n_valid
or not i_n_ready
:
117 out_muxid
= yield n
.data_o
.muxid
118 out_z
= yield n
.data_o
.z
122 print("recv", out_muxid
, hex(out_z
), "expected",
123 hex(self
.do
[muxid
][out_i
]))
125 # see if this output has occurred already, delete it if it has
126 assert muxid
== out_muxid
, "out_muxid %d not correct %d" % \
128 assert self
.do
[muxid
][out_i
] == out_z
129 del self
.do
[muxid
][out_i
]
131 # check if there's any more outputs
132 if len(self
.do
[muxid
]) == 0:
134 print("recv ended", muxid
)
137 def create_random(num_rows
, width
, single_op
=False, n_vals
=10):
139 for muxid
in range(num_rows
):
140 for i
in range(n_vals
):
142 op1
= randint(0, (1 << width
)-1)
158 #op1 = 0x9885020648d8c0e8
210 # f2int unsigned (fp64 to ui16)
211 #op1 = 0x40e6f5bc4d88b0cc
213 # f2int signed (fp64 to i16)
214 #op1 = 0xff292cf09f159ddb
215 #op1 = 0x5880e09f7cb716a1
217 # f2int signed (fp64 to i32)
218 #op1 = 0x5beb66ffc69a9a64
219 #op1 = 0xd4cdd178a1f2cdec
223 op1
= randint(0, (1 << width
)-1)
224 op2
= randint(0, (1 << width
)-1)
225 # op1 = 0x3F800000 # 1.0f32
226 # op2 = 0x40000000 # 2.0f32
236 vals
.append((op1
, op2
,))
240 def repeat(num_rows
, vals
):
241 """ bit of a hack: repeats the last value to create a list
242 that will be accepted by the muxer, all mux lists to be
246 n_to_repeat
= len(vals
) % num_rows
247 #print ("repeat", vals)
248 return vals
+ [vals
[-1]] * n_to_repeat
251 def pipe_cornercases_repeat(dut
, name
, mod
, fmod
, width
, fn
, cc
, fpfn
, count
,
252 single_op
=False, opcode
=None):
253 for i
, fixed_num
in enumerate(cc(mod
)):
254 vals
= fn(mod
, fixed_num
, count
, width
, single_op
)
255 vals
= repeat(dut
.num_rows
, vals
)
256 #print ("repeat", i, fn, single_op, list(vals))
257 fmt
= "test_pipe_fp%d_%s_cornercases_%d"
258 runfp(dut
, width
, fmt
% (width
, name
, i
),
259 fmod
, fpfn
, vals
=vals
, single_op
=single_op
, opcode
=opcode
)
262 def runfp(dut
, width
, name
, fpkls
, fpop
, single_op
=False, n_vals
=10,
263 vals
=None, opcode
=None):
264 vl
= rtlil
.convert(dut
, ports
=dut
.ports())
265 with
open("%s.il" % name
, "w") as f
:
269 vals
= create_random(dut
.num_rows
, width
, single_op
, n_vals
)
271 test
= MuxInOut(dut
, width
, fpkls
, fpop
, vals
, single_op
, opcode
=opcode
)
273 for i
in range(dut
.num_rows
):
274 fns
.append(test
.rcv(i
))
275 fns
.append(test
.send(i
))
276 run_simulation(dut
, fns
, vcd_name
="%s.vcd" % name
)