1 // SPDX-License-Identifier: LGPL-2.1-or-later
2 // See Notices.txt for copyright information
4 #![cfg_attr(feature = "native_instrs", feature(llvm_asm))]
6 #[cfg(all(feature = "native_instrs", not(target_arch = "powerpc64")))]
7 compile_error!("native_instrs feature requires target_arch to be powerpc64");
12 use power_instruction_analyzer_proc_macro::instructions;
13 use serde::{Deserialize, Serialize};
14 use serde_plain::forward_display_to_serde;
15 use std::{cmp::Ordering, fmt};
17 // powerpc bit numbers count from MSB to LSB
18 const fn get_xer_bit_mask(powerpc_bit_num: usize) -> u64 {
19 (1 << 63) >> powerpc_bit_num
22 macro_rules! xer_subset {
24 $struct_vis:vis struct $struct_name:ident {
26 #[bit($powerpc_bit_num:expr, $mask_name:ident)]
27 $field_vis:vis $field_name:ident: bool,
31 #[derive(Default, Copy, Clone, Debug, PartialEq, Serialize, Deserialize)]
32 $struct_vis struct $struct_name {
34 $field_vis $field_name: bool,
40 $field_vis const $mask_name: u64 = get_xer_bit_mask($powerpc_bit_num);
42 $struct_vis const XER_MASK: u64 = $(Self::$mask_name)|+;
43 pub const fn from_xer(xer: u64) -> Self {
46 $field_name: (xer & Self::$mask_name) != 0,
50 pub const fn to_xer(self) -> u64 {
51 let mut retval = 0u64;
54 retval |= Self::$mask_name;
64 pub struct OverflowFlags {
65 #[bit(32, XER_SO_MASK)]
67 #[bit(33, XER_OV_MASK)]
69 #[bit(44, XER_OV32_MASK)]
75 pub const fn from_overflow(overflow: bool) -> Self {
85 pub struct CarryFlags {
86 #[bit(34, XER_CA_MASK)]
88 #[bit(45, XER_CA32_MASK)]
93 #[derive(Copy, Clone, Debug, PartialEq, Serialize, Deserialize)]
94 pub struct ConditionRegister {
101 impl ConditionRegister {
102 pub const fn from_4_bits(bits: u8) -> Self {
103 // assert bits is 4-bits long
104 // can switch to using assert! once rustc feature const_panic is stabilized
105 [0; 0x10][bits as usize];
114 pub const CR_FIELD_COUNT: usize = 8;
115 pub const fn from_cr_field(cr: u32, field_index: usize) -> Self {
116 // assert field_index is less than CR_FIELD_COUNT
117 // can switch to using assert! once rustc feature const_panic is stabilized
118 [0; Self::CR_FIELD_COUNT][field_index];
120 let reversed_field_index = Self::CR_FIELD_COUNT - field_index - 1;
121 let bits = (cr >> (4 * reversed_field_index)) & 0xF;
122 Self::from_4_bits(bits as u8)
124 pub fn from_signed_int<T: Ord + Default>(value: T, so: bool) -> Self {
125 let ordering = value.cmp(&T::default());
127 lt: ordering == Ordering::Less,
128 gt: ordering == Ordering::Greater,
129 eq: ordering == Ordering::Equal,
135 #[derive(Copy, Clone, Default, Debug, PartialEq, Serialize, Deserialize)]
136 pub struct InstructionOutput {
139 skip_serializing_if = "Option::is_none",
140 with = "serde_hex::SerdeHex"
143 #[serde(default, flatten, skip_serializing_if = "Option::is_none")]
144 pub overflow: Option<OverflowFlags>,
145 #[serde(default, flatten, skip_serializing_if = "Option::is_none")]
146 pub carry: Option<CarryFlags>,
147 #[serde(default, skip_serializing_if = "Option::is_none")]
148 pub cr0: Option<ConditionRegister>,
149 #[serde(default, skip_serializing_if = "Option::is_none")]
150 pub cr1: Option<ConditionRegister>,
151 #[serde(default, skip_serializing_if = "Option::is_none")]
152 pub cr2: Option<ConditionRegister>,
153 #[serde(default, skip_serializing_if = "Option::is_none")]
154 pub cr3: Option<ConditionRegister>,
155 #[serde(default, skip_serializing_if = "Option::is_none")]
156 pub cr4: Option<ConditionRegister>,
157 #[serde(default, skip_serializing_if = "Option::is_none")]
158 pub cr5: Option<ConditionRegister>,
159 #[serde(default, skip_serializing_if = "Option::is_none")]
160 pub cr6: Option<ConditionRegister>,
161 #[serde(default, skip_serializing_if = "Option::is_none")]
162 pub cr7: Option<ConditionRegister>,
166 pub struct MissingInstructionInput {
167 pub input: InstructionInputRegister,
170 impl fmt::Display for MissingInstructionInput {
171 fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
172 write!(f, "missing instruction input: {}", self.input)
176 impl std::error::Error for MissingInstructionInput {}
178 pub type InstructionResult = Result<InstructionOutput, MissingInstructionInput>;
180 #[derive(Copy, Clone, Eq, PartialEq, Hash, Debug, Serialize, Deserialize)]
181 pub enum InstructionInputRegister {
182 #[serde(rename = "ra")]
184 #[serde(rename = "rb")]
186 #[serde(rename = "rc")]
188 #[serde(rename = "carry")]
190 #[serde(rename = "overflow")]
192 #[serde(rename = "immediate_s16")]
194 #[serde(rename = "immediate_u16")]
198 forward_display_to_serde!(InstructionInputRegister);
200 #[derive(Copy, Clone, Default, Debug, Serialize, Deserialize)]
201 pub struct InstructionInput {
204 skip_serializing_if = "Option::is_none",
205 with = "serde_hex::SerdeHex"
210 skip_serializing_if = "Option::is_none",
211 with = "serde_hex::SerdeHex"
216 skip_serializing_if = "Option::is_none",
217 with = "serde_hex::SerdeHex"
222 skip_serializing_if = "Option::is_none",
223 with = "serde_hex::SerdeHex"
225 pub immediate: Option<u64>,
226 #[serde(default, skip_serializing_if = "Option::is_none", flatten)]
227 pub carry: Option<CarryFlags>,
228 #[serde(default, skip_serializing_if = "Option::is_none", flatten)]
229 pub overflow: Option<OverflowFlags>,
232 macro_rules! impl_instr_try_get {
235 $vis:vis fn $fn:ident -> $return_type:ty { .$field:ident else $error_enum:ident }
238 impl InstructionInput {
240 $vis fn $fn(self) -> Result<$return_type, MissingInstructionInput> {
241 self.$field.ok_or(MissingInstructionInput {
242 input: InstructionInputRegister::$error_enum,
250 impl_instr_try_get! {
251 pub fn try_get_ra -> u64 {
254 pub fn try_get_rb -> u64 {
257 pub fn try_get_rc -> u64 {
260 pub fn try_get_carry -> CarryFlags {
263 pub fn try_get_overflow -> OverflowFlags {
264 .overflow else Overflow
268 impl InstructionInput {
269 fn try_get_immediate(
271 input: InstructionInputRegister,
272 ) -> Result<u64, MissingInstructionInput> {
273 self.immediate.ok_or(MissingInstructionInput { input })
275 pub fn try_get_immediate_u16(self) -> Result<u16, MissingInstructionInput> {
276 Ok(self.try_get_immediate(InstructionInputRegister::ImmediateU16)? as u16)
278 pub fn try_get_immediate_s16(self) -> Result<i16, MissingInstructionInput> {
279 Ok(self.try_get_immediate(InstructionInputRegister::ImmediateS16)? as i16)
283 fn is_false(v: &bool) -> bool {
287 #[derive(Copy, Clone, Debug, Serialize, Deserialize)]
288 pub struct TestCase {
291 pub inputs: InstructionInput,
292 #[serde(default, skip_serializing_if = "Option::is_none")]
293 pub native_outputs: Option<InstructionOutput>,
294 pub model_outputs: InstructionOutput,
295 #[serde(default, skip_serializing_if = "is_false")]
296 pub model_mismatch: bool,
299 #[derive(Clone, Debug, Serialize, Deserialize)]
300 pub struct WholeTest {
301 #[serde(default, skip_serializing_if = "Vec::is_empty")]
302 pub test_cases: Vec<TestCase>,
303 pub any_model_mismatch: bool,
308 fn addi(Ra, ImmediateS16) -> (Rt) {
314 fn add(Ra, Rb) -> (Rt) {
318 fn addo(Ra, Rb, Overflow) -> (Rt, Overflow) {
322 fn add_(Ra, Rb, Overflow) -> (Rt, CR0) {
326 fn addo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
332 fn subf(Ra, Rb) -> (Rt) {
336 fn subfo(Ra, Rb, Overflow) -> (Rt, Overflow) {
340 fn subf_(Ra, Rb, Overflow) -> (Rt, CR0) {
343 #[enumerant = SubFO_]
344 fn subfo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
350 fn addc(Ra, Rb) -> (Rt, Carry) {
354 fn addco(Ra, Rb, Overflow) -> (Rt, Carry, Overflow) {
358 fn addc_(Ra, Rb, Overflow) -> (Rt, Carry, CR0) {
361 #[enumerant = AddCO_]
362 fn addco_(Ra, Rb, Overflow) -> (Rt, Carry, Overflow, CR0) {
368 fn subfc(Ra, Rb) -> (Rt, Carry) {
371 #[enumerant = SubFCO]
372 fn subfco(Ra, Rb, Overflow) -> (Rt, Carry, Overflow) {
375 #[enumerant = SubFC_]
376 fn subfc_(Ra, Rb, Overflow) -> (Rt, Carry, CR0) {
379 #[enumerant = SubFCO_]
380 fn subfco_(Ra, Rb, Overflow) -> (Rt, Carry, Overflow, CR0) {
386 fn adde(Ra, Rb, Carry) -> (Rt, Carry) {
390 fn addeo(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow) {
394 fn adde_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, CR0) {
397 #[enumerant = AddEO_]
398 fn addeo_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
404 fn subfe(Ra, Rb, Carry) -> (Rt, Carry) {
407 #[enumerant = SubFEO]
408 fn subfeo(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow) {
411 #[enumerant = SubFE_]
412 fn subfe_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, CR0) {
415 #[enumerant = SubFEO_]
416 fn subfeo_(Ra, Rb, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
422 fn addme(Ra, Carry) -> (Rt, Carry) {
425 #[enumerant = AddMEO]
426 fn addmeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
429 #[enumerant = AddME_]
430 fn addme_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
433 #[enumerant = AddMEO_]
434 fn addmeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
439 #[enumerant = SubFME]
440 fn subfme(Ra, Carry) -> (Rt, Carry) {
443 #[enumerant = SubFMEO]
444 fn subfmeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
447 #[enumerant = SubFME_]
448 fn subfme_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
451 #[enumerant = SubFMEO_]
452 fn subfmeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
458 fn addze(Ra, Carry) -> (Rt, Carry) {
461 #[enumerant = AddZEO]
462 fn addzeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
465 #[enumerant = AddZE_]
466 fn addze_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
469 #[enumerant = AddZEO_]
470 fn addzeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
475 #[enumerant = SubFZE]
476 fn subfze(Ra, Carry) -> (Rt, Carry) {
479 #[enumerant = SubFZEO]
480 fn subfzeo(Ra, Overflow, Carry) -> (Rt, Carry, Overflow) {
483 #[enumerant = SubFZE_]
484 fn subfze_(Ra, Overflow, Carry) -> (Rt, Carry, CR0) {
487 #[enumerant = SubFZEO_]
488 fn subfzeo_(Ra, Overflow, Carry) -> (Rt, Carry, Overflow, CR0) {
493 fn addex(Ra("r3"), Rb("r4"), Overflow) -> (Rt("r5"), Overflow) {
494 // work around LLVM not supporting addex instruction:
495 "addex" : ".long 0x7CA32154 # addex r5, r3, r4, 0"
504 fn nego(Ra, Overflow) -> (Rt, Overflow) {
508 fn neg_(Ra, Overflow) -> (Rt, CR0) {
512 fn nego_(Ra, Overflow) -> (Rt, Overflow, CR0) {
518 fn divde(Ra, Rb) -> (Rt) {
521 #[enumerant = DivDEO]
522 fn divdeo(Ra, Rb, Overflow) -> (Rt, Overflow) {
525 #[enumerant = DivDE_]
526 fn divde_(Ra, Rb, Overflow) -> (Rt, CR0) {
529 #[enumerant = DivDEO_]
530 fn divdeo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
535 #[enumerant = DivDEU]
536 fn divdeu(Ra, Rb) -> (Rt) {
539 #[enumerant = DivDEUO]
540 fn divdeuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
543 #[enumerant = DivDEU_]
544 fn divdeu_(Ra, Rb, Overflow) -> (Rt, CR0) {
547 #[enumerant = DivDEUO_]
548 fn divdeuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
554 fn divd(Ra, Rb) -> (Rt) {
558 fn divdo(Ra, Rb, Overflow) -> (Rt, Overflow) {
562 fn divd_(Ra, Rb, Overflow) -> (Rt, CR0) {
565 #[enumerant = DivDO_]
566 fn divdo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
572 fn divdu(Ra, Rb) -> (Rt) {
575 #[enumerant = DivDUO]
576 fn divduo(Ra, Rb, Overflow) -> (Rt, Overflow) {
579 #[enumerant = DivDU_]
580 fn divdu_(Ra, Rb, Overflow) -> (Rt, CR0) {
583 #[enumerant = DivDUO_]
584 fn divduo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
590 fn divwe(Ra, Rb) -> (Rt) {
593 #[enumerant = DivWEO]
594 fn divweo(Ra, Rb, Overflow) -> (Rt, Overflow) {
597 #[enumerant = DivWE_]
598 fn divwe_(Ra, Rb, Overflow) -> (Rt, CR0) {
601 #[enumerant = DivWEO_]
602 fn divweo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
607 #[enumerant = DivWEU]
608 fn divweu(Ra, Rb) -> (Rt) {
611 #[enumerant = DivWEUO]
612 fn divweuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
615 #[enumerant = DivWEU_]
616 fn divweu_(Ra, Rb, Overflow) -> (Rt, CR0) {
619 #[enumerant = DivWEUO_]
620 fn divweuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
626 fn divw(Ra, Rb) -> (Rt) {
630 fn divwo(Ra, Rb, Overflow) -> (Rt, Overflow) {
634 fn divw_(Ra, Rb, Overflow) -> (Rt, CR0) {
637 #[enumerant = DivWO_]
638 fn divwo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
644 fn divwu(Ra, Rb) -> (Rt) {
647 #[enumerant = DivWUO]
648 fn divwuo(Ra, Rb, Overflow) -> (Rt, Overflow) {
651 #[enumerant = DivWU_]
652 fn divwu_(Ra, Rb, Overflow) -> (Rt, CR0) {
655 #[enumerant = DivWUO_]
656 fn divwuo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
662 fn modsd(Ra, Rb) -> (Rt) {
666 fn modud(Ra, Rb) -> (Rt) {
670 fn modsw(Ra, Rb) -> (Rt) {
674 fn moduw(Ra, Rb) -> (Rt) {
680 fn mullw(Ra, Rb) -> (Rt) {
683 #[enumerant = MulLWO]
684 fn mullwo(Ra, Rb, Overflow) -> (Rt, Overflow) {
687 #[enumerant = MulLW_]
688 fn mullw_(Ra, Rb, Overflow) -> (Rt, CR0) {
691 #[enumerant = MulLWO_]
692 fn mullwo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
698 fn mulhw(Ra, Rb) -> (Rt) {
701 #[enumerant = MulHW_]
702 fn mulhw_(Ra, Rb, Overflow) -> (Rt, CR0) {
707 #[enumerant = MulHWU]
708 fn mulhwu(Ra, Rb) -> (Rt) {
711 #[enumerant = MulHWU_]
712 fn mulhwu_(Ra, Rb, Overflow) -> (Rt, CR0) {
718 fn mulld(Ra, Rb) -> (Rt) {
721 #[enumerant = MulLDO]
722 fn mulldo(Ra, Rb, Overflow) -> (Rt, Overflow) {
725 #[enumerant = MulLD_]
726 fn mulld_(Ra, Rb, Overflow) -> (Rt, CR0) {
729 #[enumerant = MulLDO_]
730 fn mulldo_(Ra, Rb, Overflow) -> (Rt, Overflow, CR0) {
736 fn mulhd(Ra, Rb) -> (Rt) {
739 #[enumerant = MulHD_]
740 fn mulhd_(Ra, Rb, Overflow) -> (Rt, CR0) {
745 #[enumerant = MulHDU]
746 fn mulhdu(Ra, Rb) -> (Rt) {
749 #[enumerant = MulHDU_]
750 fn mulhdu_(Ra, Rb, Overflow) -> (Rt, CR0) {
755 #[enumerant = MAddHD]
756 fn maddhd(Ra, Rb, Rc) -> (Rt) {
759 #[enumerant = MAddHDU]
760 fn maddhdu(Ra, Rb, Rc) -> (Rt) {
763 #[enumerant = MAddLD]
764 fn maddld(Ra, Rb, Rc) -> (Rt) {
769 // must be after instrs macro call since it uses a macro definition