ba685b2e5e99724eb8e574343926a2f2ffdbb8b7
1 from openpower
.insndb
.asm
import SVP64Asm
2 from openpower
.test
.common
import TestAccumulatorBase
, skip_case
3 from openpower
.endian
import bigendian
4 from openpower
.simulator
.program
import Program
5 from openpower
.test
.state
import ExpectedState
6 from nmutil
.sim_util
import hash_256
7 from openpower
.decoder
.isa
.caller
import SVP64State
, CRFields
8 from openpower
.util
import log
16 b
= (ra
>> (63-k
*8-j
)) & 1
17 result |
= b
<< (63-j
*8-k
)
21 class BitManipTestCase(TestAccumulatorBase
):
24 lst
= list(SVP64Asm(lst
, bigendian
))
25 initial_regs
= [0] * 32
26 initial_regs
[1] = 0x9231_5897_2083_ffff
27 e
= ExpectedState(pc
=4)
28 e
.intregs
[0] = bmatflip(initial_regs
[1])
29 e
.intregs
[1] = initial_regs
[1]
30 log("case_gbbd", bin(initial_regs
[1]), bin(e
.intregs
[0]))
31 log("hex", hex(initial_regs
[1]), hex(e
.intregs
[0]))
33 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
35 def do_case_crternlogi(self
, bf
, bfa
, bfb
, imm
, mask
):
36 lst
= [f
"crternlogi 3,4,5,%d,%d" % (imm
, mask
)]
45 initial_cr
= cr
.cr
.asint()
46 print("initial cr", bin(initial_cr
), bf
, bfa
, bfb
)
47 print("mask tli", bin(mask
), bin(imm
))
49 lst
= list(SVP64Asm(lst
, bigendian
))
50 e
= ExpectedState(pc
=4)
51 expected
= bf
&~mask
# start at BF, mask overwrites masked bits only
52 checks
= (bfb
, bfa
, bf
) # LUT positions 1<<0=bfb 1<<1=bfa 1<<2=bf
55 for j
, check
in enumerate(checks
):
58 maskbit
= (mask
>> i
) & 0b1
59 if (imm
& (1<<lut_index
)) and maskbit
:
61 e
.crregs
[3] = expected
64 self
.add_case(Program(lst
, bigendian
), initial_regs
=None, expected
=e
,
65 initial_cr
=initial_cr
)
67 def case_crternlogi_0(self
):
68 self
.do_case_crternlogi(0b1111,
73 def case_crternlogi_random(self
):
75 rc
= bool(hash_256(f
"crternlogi rc {i}") & 1)
76 imm
= hash_256(f
"crternlogi imm {i}") & 0xFF
77 bf
= hash_256(f
"crternlogi bf {i}") % 2 ** 4
78 bfa
= hash_256(f
"crternlogi bfa {i}") % 2 ** 4
79 bfb
= hash_256(f
"crternlogi bfb {i}") % 2 ** 4
80 msk
= hash_256(f
"crternlogi msk {i}") % 2 ** 4
81 self
.do_case_crternlogi(bf
, bfa
, bfb
, imm
, msk
)
83 def do_case_ternlogi(self
, rc
, rt
, ra
, rb
, imm
):
84 rc_dot
= "." if rc
else ""
85 lst
= [f
"ternlogi{rc_dot} 3, 4, 5, {imm}"]
86 initial_regs
= [0] * 32
93 lst
= list(SVP64Asm(lst
, bigendian
))
94 e
= ExpectedState(pc
=4)
104 if imm
& 2 ** lut_index
:
106 e
.intregs
[3] = expected
110 if expected
& 2 ** 63: # sign extend
115 e
.crregs
[0] = (eq
<< 1) |
(gt
<< 2) |
(lt
<< 3)
116 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
118 def do_case_grev(self
, w
, is_imm
, ra
, rb
):
119 bits
= 32 if w
else 64
120 masked_rb
= rb
% bits
122 lst
= [f
"grev{'w' if w else ''}i. 3, 4, {masked_rb}"]
124 lst
= [f
"grev{'w' if w else ''}. 3, 4, 5"]
125 initial_regs
= [0] * 32
130 lst
= list(SVP64Asm(lst
, bigendian
))
131 e
= ExpectedState(pc
=4)
133 for i
in range(bits
):
134 dest_bit
= i ^ masked_rb
136 expected |
= 2 ** dest_bit
137 e
.intregs
[3] = expected
140 if expected
& 2 ** 63: # sign extend
145 e
.crregs
[0] = (eq
<< 1) |
(gt
<< 2) |
(lt
<< 3)
146 self
.add_case(Program(lst
, bigendian
), initial_regs
, expected
=e
)
148 def case_ternlogi_0(self
):
149 self
.do_case_ternlogi(False,
150 0x8000_0000_FFFF_0000,
151 0x8000_0000_FF00_FF00,
152 0x8000_0000_F0F0_F0F0, 0x80)
153 self
.do_case_ternlogi(True,
154 0x8000_0000_FFFF_0000,
155 0x8000_0000_FF00_FF00,
156 0x8000_0000_F0F0_F0F0, 0x80)
158 def case_ternlogi_FF(self
):
159 self
.do_case_ternlogi(False, 0, 0, 0, 0xFF)
160 self
.do_case_ternlogi(True, 0, 0, 0, 0xFF)
162 def case_ternlogi_random(self
):
164 rc
= bool(hash_256(f
"ternlogi rc {i}") & 1)
165 imm
= hash_256(f
"ternlogi imm {i}") & 0xFF
166 rt
= hash_256(f
"ternlogi rt {i}") % 2 ** 64
167 ra
= hash_256(f
"ternlogi ra {i}") % 2 ** 64
168 rb
= hash_256(f
"ternlogi rb {i}") % 2 ** 64
169 self
.do_case_ternlogi(rc
, rt
, ra
, rb
, imm
)
171 @skip_case("grev removed -- leaving code for later use in grevlut")
172 def case_grev_random(self
):
174 w
= hash_256(f
"grev w {i}") & 1
175 is_imm
= hash_256(f
"grev is_imm {i}") & 1
176 ra
= hash_256(f
"grev ra {i}") % 2 ** 64
177 rb
= hash_256(f
"grev rb {i}") % 2 ** 64
178 self
.do_case_grev(w
, is_imm
, ra
, rb
)
180 @skip_case("grev removed -- leaving code for later use in grevlut")
181 def case_grevi_1(self
):
182 self
.do_case_grev(False, True, 14361919363078703450,
185 @skip_case("grev removed -- leaving code for later use in grevlut")
186 def case_grevi_2(self
):
187 self
.do_case_grev(True, True, 397097147229333315, 8326716970539357702)
189 @skip_case("grev removed -- leaving code for later use in grevlut")
190 def case_grevi_3(self
):
191 self
.do_case_grev(True, True, 0xFFFF_FFFF_0000_0000, 6)
193 def case_byterev(self
):
195 options
= (("HHHH", "brh"), ("LL", "brw"), ("Q", "brd"))
196 values
= (0x0123456789ABCDEF, 0xFEDCBA9876543210)
197 for RS
, (pack_str
, mnemonic
) in itertools
.product(values
, options
):
198 prog
= Program(list(SVP64Asm(["%s 3,4" % mnemonic
])), bigendian
)
199 chunks
= struct
.unpack("<" + pack_str
, struct
.pack("<Q", RS
))
200 res
= struct
.unpack("<Q", struct
.pack(">" + pack_str
, *chunks
))[0]
201 with self
.subTest(mnemonic
=mnemonic
, RS
=hex(RS
), expected
=hex(res
)):
204 e
= ExpectedState(pc
=4, int_regs
=gprs
)
206 self
.add_case(prog
, gprs
, expected
=e
)
208 def case_sv_byterev(self
):
209 """ sv.brh/brw/brd """
210 options
= (("HHHH", "brh"), ("LL", "brw"), ("Q", "brd"))
212 for idx
, (pack_str
, mnemonic
) in itertools
.product(values
, options
):
213 listing
= list(SVP64Asm(["sv.%s *10,*20" % mnemonic
]))
214 prog
= Program(listing
, bigendian
)
216 svstate
= SVP64State()
220 for elidx
in range(VL
):
221 k
= "sv.%s %d %d r20" % (mnemonic
, idx
, elidx
)
222 gprs
[20 + elidx
] = hash_256(k
) % 2**64
223 e
= ExpectedState(pc
=8, int_regs
=gprs
)
224 for elidx
in range(VL
):
225 packed
= struct
.pack("<Q", gprs
[20 + elidx
])
226 chunks
= struct
.unpack( "<" + pack_str
, packed
)
227 packed
= struct
.pack(">" + pack_str
, *chunks
)
228 res
= struct
.unpack("<Q", packed
)[0]
229 e
.intregs
[10 + elidx
] = res
230 RS
= [hex(gprs
[20 + i
]) for i
in range(VL
)],
231 res
=[hex(e
.intregs
[10 + i
]) for i
in range(VL
)]
232 with self
.subTest(case_idx
=idx
, RS_in
=RS
, expected_RA
=res
):
233 self
.add_case(prog
, gprs
, expected
=e
, initial_svstate
=svstate
)